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/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/* This is board specific information: IRQ routing for the
* 0:1e.0 PCI bridge of the ICH7
*/
If (PICM) {
Return (Package() {
Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 },
Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 },
Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 },
Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x10 },
Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x15 },
Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x16 },
Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x14 }
})
} Else {
Return (Package() {
Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LPCB.LNKA, 0x00 },
Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LPCB.LNKB, 0x00 },
Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LPCB.LNKC, 0x00 },
Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LPCB.LNKA, 0x00 },
Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LPCB.LNKF, 0x00 },
Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LPCB.LNKG, 0x00 },
Package (0x04) { 0x0008FFFF, 0x00, \_SB.PCI0.LPCB.LNKE, 0x00 }
})
}
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