blob: 3eb76707840d44ee30ec2e16684ef8fb51d4bfe1 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
|
/* SPDX-License-Identifier: GPL-2.0-only */
/******************************************************************************
* $Workfile:: cache_as_ram.S
*
* Description: CAR setup called from bootblock_crt0.S.
*
******************************************************************************
*/
#include "gcccar.inc"
#include <cpu/x86/post_code.h>
/*
* on entry:
* mm0: BIST (ignored)
* mm2_mm1: timestamp at bootblock_protected_mode_entry
*/
.global bootblock_pre_c_entry
bootblock_pre_c_entry:
post_code(0xa0)
AMD_ENABLE_STACK
/* Align the stack and keep aligned for call to bootblock_c_entry() */
and $0xfffffff0, %esp
sub $8, %esp
movd %mm2, %eax
pushl %eax /* tsc[63:32] */
movd %mm1, %eax
pushl %eax /* tsc[31:0] */
before_carstage:
post_code(0xa2)
call bootblock_c_entry
/* Never reached */
.halt_forever:
post_code(POST_DEAD_CODE)
hlt
jmp .halt_forever
|
