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/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef _SOC_RAMSTAGE_H_
#define _SOC_RAMSTAGE_H_

#include <arch/cpu.h>
#include <device/device.h>
#include <soc/QuarkNcSocId.h>

#include "../../chip.h"

void mainboard_gpio_i2c_init(struct device *dev);
asmlinkage void chipset_teardown_car(void);

#endif /* _SOC_RAMSTAGE_H_ */