src/soc/intel/tigerlake/bootblock/cpu.c


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

/* SPDX-License-Identifier: GPL-2.0-only */

/*
 * This file is created based on Intel Tiger Lake Processor PCH Datasheet
 * Document number: 575857
 * Chapter number: 6
 */

#include <intelblocks/fast_spi.h>
#include <soc/bootblock.h>

void bootblock_cpu_init(void)
{
	/*
	 * Tigerlake platform doesn't support booting from any other media
	 * (like eMMC on APL/GLK platform) than only booting from SPI device
	 * and on IA platform SPI is memory mapped hence enabling temporarily
	 * cacheing on memory-mapped spi boot media.
	 *
	 * This assumption will not hold good for APL/GLK platform where boot
	 * from eMMC is also possible options.
	 */
	fast_spi_cache_bios_region();
}