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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* This file is created based on Intel Tiger Lake Processor PCH Datasheet
* Document number: 575857
* Chapter number: 3
*/
#ifndef _SOC_TIGERLAKE_P2SB_H_
#define _SOC_TIGERLAKE_P2SB_H_
#define HPTC_OFFSET 0x60
#define HPTC_ADDR_ENABLE_BIT (1 << 7)
#define PCH_P2SB_EPMASK0 0x220
#endif
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