blob: 2d500d96e2cc50885eadb476fbdc15ccd6fa78de (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
|
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
#ifndef SOC_MEDIATEK_COMMON_WDT_H
#define SOC_MEDIATEK_COMMON_WDT_H
#include <stdint.h>
#include <soc/addressmap.h>
struct mtk_wdt_regs {
u32 wdt_mode;
u32 wdt_length;
u32 wdt_restart;
u32 wdt_status;
u32 wdt_interval;
u32 wdt_swrst;
u32 wdt_swsysrst;
u32 reserved[9];
u32 wdt_debug_ctrl;
};
/* WDT_MODE */
enum {
MTK_WDT_MODE_KEY = 0x22000000,
MTK_WDT_MODE_DUAL_MODE = 1 << 6,
MTK_WDT_MODE_IRQ = 1 << 3,
MTK_WDT_MODE_EXTEN = 1 << 2,
MTK_WDT_MODE_EXT_POL = 1 << 1,
MTK_WDT_MODE_ENABLE = 1 << 0
};
/* WDT_RESET */
enum {
MTK_WDT_SWRST_KEY = 0x1209,
MTK_WDT_STA_SPM_RST = 1 << 1,
MTK_WDT_STA_SW_RST = 1 << 30,
MTK_WDT_STA_HW_RST = 1 << 31
};
static struct mtk_wdt_regs *const mtk_wdt = (void *)RGU_BASE;
int mtk_wdt_init(void);
#endif /* SOC_MEDIATEK_COMMON_WDT_H */
|
