summaryrefslogtreecommitdiffstats
path: root/src/soc/mediatek/mt8183/include/soc/emi.h
blob: 15889eeca445887e94cbb1c41bfc6e644043c2b5 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
/*
 * This file is part of the coreboot project.
 *
 * Copyright 2018 MediaTek Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef SOC_MEDIATEK_MT8183_EMI_H
#define SOC_MEDIATEK_MT8183_EMI_H

#include <stdint.h>
#include <types.h>
#include <soc/dramc_common_mt8183.h>

struct sdram_params {
	u8 wr_level[CHANNEL_MAX][RANK_MAX][DQS_NUMBER];
	u8 cbt_cs_dly[CHANNEL_MAX][RANK_MAX];
	u8 cbt_final_vref[CHANNEL_MAX][RANK_MAX];
	u32 emi_cona_val;
	u32 emi_conh_val;
	u32 emi_conf_val;
	u32 chn_emi_cona_val[CHANNEL_MAX];
	u32 cbt_mode_extern;
	u16 delay_cell_unit;
};

enum {
	LP4X_DDR1600,
	LP4X_DDR2400,
	LP4X_DDR3200,
	LP4X_DDR3600,
	LP4X_DDRFREQ_MAX,
};

extern const u8 phy_mapping[CHANNEL_MAX][16];

int complex_mem_test(u8 *start, unsigned int len);
size_t sdram_size(void);
const struct sdram_params *get_sdram_config(void);
void enable_emi_dcm(void);
void mt_set_emi(const struct sdram_params *params);
void mt_mem_init(const struct sdram_params *params);

#endif /* SOC_MEDIATEK_MT8183_EMI_H */