blob: 50bc54819492d1aae91071d140bb187ad1b2dd99 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
|
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
#ifndef __SOC_NVIDIA_TEGRA124_SDRAM_H__
#define __SOC_NVIDIA_TEGRA124_SDRAM_H__
#include <soc/sdram_param.h>
uint32_t sdram_get_ram_code(void);
void sdram_init(const struct sdram_params *param);
int sdram_size_mb(void);
uintptr_t sdram_max_addressable_mb(void);
/* Save params to PMC scratch registers for use by BootROM on LP0 resume. */
void sdram_lp0_save_params(const struct sdram_params *sdram);
#endif /* __SOC_NVIDIA_TEGRA124_SDRAM_H__ */
|