blob: 7399b0f59547aa839eb336c9f83787281219a1f4 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
|
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
#include <stdint.h>
#include <amdblocks/acpimmio.h>
#include "SBPLATFORM.h"
#include "sb_cimx.h"
#include "cfg.h" /*sb800_cimx_config*/
/**
* @brief South Bridge CIMx romstage entry,
* wrapper of sbPowerOnInit entry point.
*/
void sb_Poweron_Init(void)
{
AMDSBCFG sb_early_cfg;
sb800_cimx_config(&sb_early_cfg);
//sb_early_cfg.StdHeader.Func = SB_POWERON_INIT;
//AmdSbDispatcher(&sb_early_cfg);
//TODO
//AMD_IMAGE_HEADER was missing, when using AmdSbDispatcher,
// VerifyImage() will fail, LocateImage() takes minutes to find the image.
sbPowerOnInit(&sb_early_cfg);
}
/**
* CIMX not set the clock to 48Mhz until sbBeforePciInit,
* coreboot may need to set this even more earlier
*/
void sb800_clk_output_48Mhz(void)
{
misc_write32(0x40, misc_read32(0x40) & (~5));
misc_write32(0x40, misc_read32(0x40) | 2);
}
|
