OvmfPkg/Sec: Move TDX APs related nasm code to IntelTdxAPs.nasm

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4172

This patch moves the TDX APs nasm code from SecEntry.nasm to
IntelTdxAPs.nasm. IntelTdxX64 and OvmfPkgX64 use the same nasm so that
it can be easier to be managed. In the following patch there will be
AcceptMemory related changes in IntelTdxAPs.nasm.

Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

3 files changed, 68 insertions, 106 deletions

diff --git a/OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm b/OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm
new file mode 100644
index 0000000000..034ac0ee94
--- /dev/null
+++ b/OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm
@@ -0,0 +1,58 @@
+;------------------------------------------------------------------------------

+; @file

+; Intel TDX APs

+;

+; Copyright (c) 2021 - 2022, Intel Corporation. All rights reserved.<BR>

+; SPDX-License-Identifier: BSD-2-Clause-Patent

+;

+;------------------------------------------------------------------------------

+

+%include "TdxCommondefs.inc"

+

+    ;

+    ; Note: BSP never gets here. APs will be unblocked by DXE

+    ;

+    ; R8  [31:0]  NUM_VCPUS

+    ;     [63:32] MAX_VCPUS

+    ; R9  [31:0]  VCPU_INDEX

+    ;

+ParkAp:

+

+do_wait_loop:

+    ;

+    ; register itself in [rsp + CpuArrivalOffset]

+    ;

+    mov       rax, 1

+    lock xadd dword [rsp + CpuArrivalOffset], eax

+    inc       eax

+

+.check_arrival_cnt:

+    cmp       eax, r8d

+    je        .check_command

+    mov       eax, dword[rsp + CpuArrivalOffset]

+    jmp       .check_arrival_cnt

+

+.check_command:

+    mov     eax, dword[rsp + CommandOffset]

+    cmp     eax, MpProtectedModeWakeupCommandNoop

+    je      .check_command

+

+    cmp     eax, MpProtectedModeWakeupCommandWakeup

+    je      .do_wakeup

+

+    ; Don't support this command, so ignore

+    jmp     .check_command

+

+.do_wakeup:

+    ;

+    ; BSP sets these variables before unblocking APs

+    ;   RAX:  WakeupVectorOffset

+    ;   RBX:  Relocated mailbox address

+    ;   RBP:  vCpuId

+    ;

+    mov     rax, 0

+    mov     eax, dword[rsp + WakeupVectorOffset]

+    mov     rbx, [rsp + WakeupArgsRelocatedMailBox]

+    nop

+    jmp     rax

+    jmp     $

diff --git a/OvmfPkg/IntelTdx/Sec/X64/SecEntry.nasm b/OvmfPkg/IntelTdx/Sec/X64/SecEntry.nasm
index 4528fec309..5a38c42139 100644
--- a/OvmfPkg/IntelTdx/Sec/X64/SecEntry.nasm
+++ b/OvmfPkg/IntelTdx/Sec/X64/SecEntry.nasm
@@ -10,7 +10,6 @@
 ;------------------------------------------------------------------------------

 

 #include <Base.h>

-%include "TdxCommondefs.inc"

 

 DEFAULT REL

 SECTION .text

@@ -49,6 +48,7 @@ ASM_PFX(_ModuleEntryPoint):
     cmp     byte[eax], VM_GUEST_TYPE_TDX

     jne     InitStack

 

+    %define TDCALL_TDINFO         1

     mov     rax, TDCALL_TDINFO

     tdcall

 

@@ -62,7 +62,9 @@ ASM_PFX(_ModuleEntryPoint):
     mov     rax, r9

     and     rax, 0xffff

     test    rax, rax

-    jne     ParkAp

+    jz      InitStack

+    mov     rsp, FixedPcdGet32 (PcdOvmfSecGhcbBackupBase)

+    jmp     ParkAp

 

 InitStack:

 

@@ -98,54 +100,4 @@ InitStack:
     sub     rsp, 0x20

     call    ASM_PFX(SecCoreStartupWithStack)

 

-    ;

-    ; Note: BSP never gets here. APs will be unblocked by DXE

-    ;

-    ; R8  [31:0]  NUM_VCPUS

-    ;     [63:32] MAX_VCPUS

-    ; R9  [31:0]  VCPU_INDEX

-    ;

-ParkAp:

-

-    mov     rbp,  r9

-

-.do_wait_loop:

-    mov     rsp, FixedPcdGet32 (PcdOvmfSecGhcbBackupBase)

-

-    ;

-    ; register itself in [rsp + CpuArrivalOffset]

-    ;

-    mov       rax, 1

-    lock xadd dword [rsp + CpuArrivalOffset], eax

-    inc       eax

-

-.check_arrival_cnt:

-    cmp       eax, r8d

-    je        .check_command

-    mov       eax, dword[rsp + CpuArrivalOffset]

-    jmp       .check_arrival_cnt

-

-.check_command:

-    mov     eax, dword[rsp + CommandOffset]

-    cmp     eax, MpProtectedModeWakeupCommandNoop

-    je      .check_command

-

-    cmp     eax, MpProtectedModeWakeupCommandWakeup

-    je      .do_wakeup

-

-    ; Don't support this command, so ignore

-    jmp     .check_command

-

-.do_wakeup:

-    ;

-    ; BSP sets these variables before unblocking APs

-    ;   RAX:  WakeupVectorOffset

-    ;   RBX:  Relocated mailbox address

-    ;   RBP:  vCpuId

-    ;

-    mov     rax, 0

-    mov     eax, dword[rsp + WakeupVectorOffset]

-    mov     rbx, [rsp + WakeupArgsRelocatedMailBox]

-    nop

-    jmp     rax

-    jmp     $

+%include "IntelTdxAPs.nasm"

diff --git a/OvmfPkg/Sec/X64/SecEntry.nasm b/OvmfPkg/Sec/X64/SecEntry.nasm
index 4528fec309..0f82051720 100644
--- a/OvmfPkg/Sec/X64/SecEntry.nasm
+++ b/OvmfPkg/Sec/X64/SecEntry.nasm
@@ -10,7 +10,6 @@
 ;------------------------------------------------------------------------------

 

 #include <Base.h>

-%include "TdxCommondefs.inc"

 

 DEFAULT REL

 SECTION .text

@@ -49,6 +48,7 @@ ASM_PFX(_ModuleEntryPoint):
     cmp     byte[eax], VM_GUEST_TYPE_TDX

     jne     InitStack

 

+    %define TDCALL_TDINFO         1

     mov     rax, TDCALL_TDINFO

     tdcall

 

@@ -62,7 +62,9 @@ ASM_PFX(_ModuleEntryPoint):
     mov     rax, r9

     and     rax, 0xffff

     test    rax, rax

-    jne     ParkAp

+    jz      InitStack

+    mov     rsp, FixedPcdGet32 (PcdOvmfSecGhcbBackupBase)

+    jmp     ParkAp

 

 InitStack:

 

@@ -98,54 +100,4 @@ InitStack:
     sub     rsp, 0x20

     call    ASM_PFX(SecCoreStartupWithStack)

 

-    ;

-    ; Note: BSP never gets here. APs will be unblocked by DXE

-    ;

-    ; R8  [31:0]  NUM_VCPUS

-    ;     [63:32] MAX_VCPUS

-    ; R9  [31:0]  VCPU_INDEX

-    ;

-ParkAp:

-

-    mov     rbp,  r9

-

-.do_wait_loop:

-    mov     rsp, FixedPcdGet32 (PcdOvmfSecGhcbBackupBase)

-

-    ;

-    ; register itself in [rsp + CpuArrivalOffset]

-    ;

-    mov       rax, 1

-    lock xadd dword [rsp + CpuArrivalOffset], eax

-    inc       eax

-

-.check_arrival_cnt:

-    cmp       eax, r8d

-    je        .check_command

-    mov       eax, dword[rsp + CpuArrivalOffset]

-    jmp       .check_arrival_cnt

-

-.check_command:

-    mov     eax, dword[rsp + CommandOffset]

-    cmp     eax, MpProtectedModeWakeupCommandNoop

-    je      .check_command

-

-    cmp     eax, MpProtectedModeWakeupCommandWakeup

-    je      .do_wakeup

-

-    ; Don't support this command, so ignore

-    jmp     .check_command

-

-.do_wakeup:

-    ;

-    ; BSP sets these variables before unblocking APs

-    ;   RAX:  WakeupVectorOffset

-    ;   RBX:  Relocated mailbox address

-    ;   RBP:  vCpuId

-    ;

-    mov     rax, 0

-    mov     eax, dword[rsp + WakeupVectorOffset]

-    mov     rbx, [rsp + WakeupArgsRelocatedMailBox]

-    nop

-    jmp     rax

-    jmp     $

+%include "../../IntelTdx/Sec/X64/IntelTdxAPs.nasm"