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author | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-05-18 01:35:15 +0000 |
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committer | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-05-18 01:35:15 +0000 |
commit | 4cb67745fd98d03c77b60a95cec082711067d57e (patch) | |
tree | 295923a1b3a6f1c4bb7fa04756dc98937cbb239f | |
parent | 9203284167b16a0f3ed08c679d200b8bf293d7a2 (diff) | |
download | edk2-4cb67745fd98d03c77b60a95cec082711067d57e.tar.gz edk2-4cb67745fd98d03c77b60a95cec082711067d57e.tar.bz2 edk2-4cb67745fd98d03c77b60a95cec082711067d57e.zip |
Fix OS X build issues. Wrong slash direction in include path and unused variable warnning.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10498 6f19259b-4bc3-4df7-8a09-765794883524
-rwxr-xr-x | ArmEbPkg/Include/ArmEb/ArmEb.h | 4 | ||||
-rwxr-xr-x | ArmEbPkg/TimerDxe/Timer.c | 121 |
2 files changed, 74 insertions, 51 deletions
diff --git a/ArmEbPkg/Include/ArmEb/ArmEb.h b/ArmEbPkg/Include/ArmEb/ArmEb.h index 0018e84eba..f855e6379d 100755 --- a/ArmEbPkg/Include/ArmEb/ArmEb.h +++ b/ArmEbPkg/Include/ArmEb/ArmEb.h @@ -14,7 +14,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #ifndef __ARM_EB_H__
#define __ARM_EB_H__
-#include <ArmEb\ArmEbUart.h>
-#include <ArmEb\ArmEbTimer.h>
+#include <ArmEb/ArmEbUart.h>
+#include <ArmEb/ArmEbTimer.h>
#endif
diff --git a/ArmEbPkg/TimerDxe/Timer.c b/ArmEbPkg/TimerDxe/Timer.c index a034eef0f2..12102a3c0b 100755 --- a/ArmEbPkg/TimerDxe/Timer.c +++ b/ArmEbPkg/TimerDxe/Timer.c @@ -75,7 +75,8 @@ TimerInterruptHandler ( // OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL); - // clear the periodic interrupt
+ // clear the periodic interrupt + MmioWrite32 (EB_SP804_TIMER0_BASE + SP804_TIMER_INT_CLR_REG, 0); // signal end of interrupt early to help avoid losing subsequent ticks from long duration handlers @@ -173,32 +174,50 @@ TimerDriverSetTimerPeriod ( ) { EFI_STATUS Status; - UINT64 TimerTicks;
+ UINT64 TimerTicks; + // always disable the timer MmioAnd32 (EB_SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, ~SP804_TIMER_CTRL_ENABLE); if (TimerPeriod == 0) { - // leave timer disabled from above, and...
- // disable timer 0/1 interrupt for a TimerPeriod of 0
+ // leave timer disabled from above, and... + + // disable timer 0/1 interrupt for a TimerPeriod of 0 + Status = gInterrupt->DisableInterruptSource (gInterrupt, gVector); } else { - // Convert TimerPeriod into 1MHz clock counts (us units = 100ns units / 10)
- TimerTicks = DivU64x32 (TimerPeriod, 10);
-
- // if it's larger than 32-bits, pin to highest value
- if (TimerTicks > 0xffffffff) {
- TimerTicks = 0xffffffff;
- }
-
- // Program the SP804 timer with the new count value
- MmioWrite32 (EB_SP804_TIMER0_BASE + SP804_TIMER_LOAD_REG, TimerTicks);
-
- // enable the timer
- MmioOr32 (EB_SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
-
- // enable timer 0/1 interrupts
+ // Convert TimerPeriod into 1MHz clock counts (us units = 100ns units / 10) + + TimerTicks = DivU64x32 (TimerPeriod, 10); + + + + // if it's larger than 32-bits, pin to highest value + + if (TimerTicks > 0xffffffff) { + + TimerTicks = 0xffffffff; + + } + + + + // Program the SP804 timer with the new count value + + MmioWrite32 (EB_SP804_TIMER0_BASE + SP804_TIMER_LOAD_REG, TimerTicks); + + + + // enable the timer + + MmioOr32 (EB_SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE); + + + + // enable timer 0/1 interrupts + Status = gInterrupt->EnableInterruptSource (gInterrupt, gVector); } @@ -330,26 +349,29 @@ TimerInitialize ( { EFI_HANDLE Handle = NULL; EFI_STATUS Status; - UINT32 TimerBaseAddress; - - // configure free running timer (TIMER1) for 1MHz operation
-
- // AND disable clock, OR configure 1MHz clock
- MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER1_EN, SP810_SYS_CTRL_TIMER1_TIMCLK);
-
- // Renable timer
- MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_EN);
-
-
- // configure timer 1 for free running operation, 32 bits, no prescaler, interrupt disabled
- MmioWrite32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
-
- // enable the free running timer
- MmioOr32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
-
- // record free running tick value (should be close to 0xffffffff)
- mLastTickCount = MmioRead32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CURRENT_REG);
-
+ + + // configure free running timer (TIMER1) for 1MHz operation + + + // AND disable clock, OR configure 1MHz clock + MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER1_EN, SP810_SYS_CTRL_TIMER1_TIMCLK); + + + // Renable timer + MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_EN); + + + // configure timer 1 for free running operation, 32 bits, no prescaler, interrupt disabled + MmioWrite32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1); + + // enable the free running timer + MmioOr32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE); + + // record free running tick value (should be close to 0xffffffff) + mLastTickCount = MmioRead32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CURRENT_REG); + + // Disable the timer Status = TimerDriverSetTimerPeriod (&gTimer, 0); ASSERT_EFI_ERROR (Status); @@ -358,18 +380,19 @@ TimerInitialize ( gVector = EB_TIMER01_INTERRUPT_NUM; Status = gInterrupt->RegisterInterruptSource (gInterrupt, gVector, TimerInterruptHandler); ASSERT_EFI_ERROR (Status); -
-
- // configure periodic timer (TIMER0) for 1MHz operation
- MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER0_EN, SP810_SYS_CTRL_TIMER0_TIMCLK);
-
- // Renable timer
- MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_EN);
-
- // configure timer 0 for periodic operation, 32 bits, no prescaler, and interrupt enabled
- MmioWrite32 (EB_SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_PERIODIC | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1 | SP804_TIMER_CTRL_INT_ENABLE);
+ // configure periodic timer (TIMER0) for 1MHz operation + MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER0_EN, SP810_SYS_CTRL_TIMER0_TIMCLK); + + + // Renable timer + MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_EN); + + + // configure timer 0 for periodic operation, 32 bits, no prescaler, and interrupt enabled + MmioWrite32 (EB_SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_PERIODIC | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1 | SP804_TIMER_CTRL_INT_ENABLE); + // Set up default timer Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD ASSERT_EFI_ERROR (Status); |