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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-12-06 22:10:36 +0100 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-12-07 12:24:19 +0100 |
| commit | a5274cdc87d952a4609b0baef92df3a4b6a36059 (patch) | |
| tree | ab88018a9fd8c1ee55fcc321aeb26c1a5e3042c9 | |
| parent | 9601046bf4594be981b6ee9f75f81f0bc0e2cf54 (diff) | |
| download | edk2-a5274cdc87d952a4609b0baef92df3a4b6a36059.tar.gz edk2-a5274cdc87d952a4609b0baef92df3a4b6a36059.tar.bz2 edk2-a5274cdc87d952a4609b0baef92df3a4b6a36059.zip | |
Revert "MdePkg/ProcessorBind.h AARCH64: limit MAX_ADDRESS to 48 bits"
This reverts commit 82379bf6603274e81604d5a6f6bb14bdde616286.
On AArch64, we can only use 48 address bits while running in UEFI,
while the GCD and UEFI memory maps may describe up to 52 bits of
physical address space. For this reason, MAX_ADDRESS was reduced
to 48 bits, to ensure that the firmware does not inadvertently
attempt to allocate memory that we cannot access.
However, MAX_ADDRESS is used in runtime drivers as well, and
runtime drivers may deal with kernel virtual addresses, which have
bits [63:48] set. In fact, the OS may be running with 64 KB pages
and pass addresses into the runtime services that use up to 52
bits of address space, either with the top bits set or cleared,
even if the physical address space does not extend beyond 48 bits.
In summary, changing MAX_ADDRESS is a mistake, and needs to be
reverted.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
| -rw-r--r-- | MdePkg/Include/AArch64/ProcessorBind.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/MdePkg/Include/AArch64/ProcessorBind.h b/MdePkg/Include/AArch64/ProcessorBind.h index dad75df1c5..968c18f915 100644 --- a/MdePkg/Include/AArch64/ProcessorBind.h +++ b/MdePkg/Include/AArch64/ProcessorBind.h @@ -138,9 +138,9 @@ typedef INT64 INTN; #define MAX_2_BITS 0xC000000000000000ULL
///
-/// Maximum legal AARCH64 address (48 bits for 4 KB page size)
+/// Maximum legal AARCH64 address
///
-#define MAX_ADDRESS 0xFFFFFFFFFFFFULL
+#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL
///
/// Maximum legal AArch64 INTN and UINTN values.
|