ArmVirtPkg/ArmVirtGicArchLib: adapt ASSERT()s to 64-bit base addresses

Since All the GIC base address variables has been aligned to 64-bit, it
doesn't make sense to continue use MAX_UINT32 in ASSERT() statement, so
this patch uses MAX_UINTN to adapt to this kind of change.

Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Dennis Chen <dennis.chen@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

1 files changed, 4 insertions, 4 deletions

diff --git a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
index 64afc4de6b..648806126e 100644
--- a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
+++ b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
@@ -79,11 +79,11 @@ ArmVirtGicArchLibConstructor (
 

     // RegProp[0..1] == { GICD base, GICD size }

     DistBase = SwapBytes64 (Reg[0]);

-    ASSERT (DistBase < MAX_UINT32);

+    ASSERT (DistBase < MAX_UINTN);

 

     // RegProp[2..3] == { GICR base, GICR size }

     RedistBase = SwapBytes64 (Reg[2]);

-    ASSERT (RedistBase < MAX_UINT32);

+    ASSERT (RedistBase < MAX_UINTN);

 

     PcdSet64 (PcdGicDistributorBase, DistBase);

     PcdSet64 (PcdGicRedistributorsBase, RedistBase);

@@ -117,8 +117,8 @@ ArmVirtGicArchLibConstructor (
 

     DistBase = SwapBytes64 (Reg[0]);

     CpuBase  = SwapBytes64 (Reg[2]);

-    ASSERT (DistBase < MAX_UINT32);

-    ASSERT (CpuBase < MAX_UINT32);

+    ASSERT (DistBase < MAX_UINTN);

+    ASSERT (CpuBase < MAX_UINTN);

 

     PcdSet64 (PcdGicDistributorBase, DistBase);

     PcdSet64 (PcdGicInterruptInterfaceBase, CpuBase);