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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2016-09-09 13:55:34 +0100
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2016-09-13 16:28:54 +0100
commitd947fbed72226011961e5e2691f09baebf128795 (patch)
treed02a89f8a57b244fec1e8fff1573e96dfdb310b5
parentc86cd1e175fb3f3b545521c53fa751141abd1b2d (diff)
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MdePkg/BaseMemoryLibOptDxe ARM|AARCH64: disallow use in SEC & PEI phases
The new accelerated ARM and AARCH64 implementations take advantage of features that are only available when the MMU and Dcache are on. So restrict the use of this library to the DXE phase or later. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
-rw-r--r--MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf9
1 files changed, 9 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf b/MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf
index 64d11b09ef..5ddc0cbc2d 100644
--- a/MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf
+++ b/MdePkg/Library/BaseMemoryLibOptDxe/BaseMemoryLibOptDxe.inf
@@ -116,6 +116,15 @@
X64/CopyMem.S
X64/IsZeroBuffer.nasm
+[Defines.ARM, Defines.AARCH64]
+ #
+ # The ARM implementations of this library may perform unaligned accesses, and
+ # may use DC ZVA instructions that are only allowed when the MMU and D-cache
+ # are on. Since SEC, PEI_CORE and PEIM modules may execute with the MMU off,
+ # omit them from the supported module types list for this library.
+ #
+ LIBRARY_CLASS = BaseMemoryLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER UEFI_DRIVER UEFI_APPLICATION
+
[Sources.ARM]
Arm/ScanMem.S |GCC
Arm/SetMem.S |GCC