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author | Jeff Fan <jeff.fan@intel.com> | 2017-02-21 11:29:45 +0800 |
---|---|---|
committer | Jeff Fan <jeff.fan@intel.com> | 2017-02-22 09:50:04 +0800 |
commit | b9d56d0b93ae4827bb447ff4a32f1f7ab46ccd94 (patch) | |
tree | 478403b06700d9ec8c31e09731f1eac57c4f5f69 | |
parent | e0307a7dad02aa8c0cd8b3b0b9edce8ddb3fef2e (diff) | |
download | edk2-b9d56d0b93ae4827bb447ff4a32f1f7ab46ccd94.tar.gz edk2-b9d56d0b93ae4827bb447ff4a32f1f7ab46ccd94.tar.bz2 edk2-b9d56d0b93ae4827bb447ff4a32f1f7ab46ccd94.zip |
UefiCpuPkg/ExceptionHandlerAsm.S: Fix code length issue with GCC 5.4
X64\ExceptionHandlerAsm.S define MARCO to set up 32 IDT entries header.
It assume GCC compiler will generate the same code length on the following
instrction for each IDT entry.
jmp ASM_PFX(CommonInterruptEntry)
It works with GCC 4.x. However, GCC 5.4 will generate different code size of IDT
entry code per the offset value from CommonInterruptEntry address. We should use
DB to make sure each IDT entry header has the same size whatever compiler
version.
.ASM and .nasm used the different solution and do not have this issue.
https://bugzilla.tianocore.org/show_bug.cgi?id=389
Cc: Liming Gao <liming.gao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
-rw-r--r-- | UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S index 6b62f095bd..975adaa103 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S @@ -1,5 +1,5 @@ #------------------------------------------------------------------------------ ;
-# Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -36,7 +36,8 @@ ASM_GLOBAL ASM_PFX(CommonExceptionHandler) .macro IDT_MACRO arg
push \arg
#endif
- jmp ASM_PFX(CommonInterruptEntry)
+ .byte 0xe9 # jmp ASM_PFX(CommonInterruptEntry)
+ .long ASM_PFX(CommonInterruptEntry) - . - 4
.endm
AsmIdtVectorBegin:
|