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| author | Ard Biesheuvel <ardb@kernel.org> | 2023-01-05 14:43:14 +0100 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2023-01-10 17:37:39 +0000 |
| commit | 5ee17c5418bd4e0b26686bff14b71b3d83438a30 (patch) | |
| tree | 88e46ec293e1c486037f73a74411c8d012014904 | |
| parent | 717f35a9f2d883a74998f7deb3d2cdf95bddf039 (diff) | |
| download | edk2-5ee17c5418bd4e0b26686bff14b71b3d83438a30.tar.gz edk2-5ee17c5418bd4e0b26686bff14b71b3d83438a30.tar.bz2 edk2-5ee17c5418bd4e0b26686bff14b71b3d83438a30.zip | |
ArmVirtPkg/ArmPlatformLibQemu: Ensure that VFP is on before running C code
Now that we build the early code without strict alignment and without
suppressing the use of SIMD registers, ensure that the VFP unit is on
before entering C code.
While at it, simplyify the mov_i macro, which is only used for 32-bit
quantities.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: dann frazier <dann.frazier@canonical.com>
| -rw-r--r-- | ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S b/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S index 05ccc7f9f0..1787d52fbf 100644 --- a/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S +++ b/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S @@ -8,9 +8,7 @@ #include <AsmMacroIoLibV8.h>
.macro mov_i, reg:req, imm:req
- movz \reg, :abs_g3:\imm
- movk \reg, :abs_g2_nc:\imm
- movk \reg, :abs_g1_nc:\imm
+ movz \reg, :abs_g1:\imm
movk \reg, :abs_g0_nc:\imm
.endm
@@ -45,10 +43,9 @@ ASM_FUNC(ArmPlatformPeiBootAction)
mrs x0, CurrentEL // check current exception level
- tbz x0, #3, 0f // bail if above EL1
- ret
+ tbnz x0, #3, 0f // omit early ID map if above EL1
-0:mov_i x0, mairval
+ mov_i x0, mairval
mov_i x1, tcrval
adrp x2, idmap
orr x2, x2, #0xff << 48 // set non-zero ASID
@@ -87,7 +84,8 @@ ASM_FUNC(ArmPlatformPeiBootAction) msr sctlr_el1, x3 // enable MMU and caches
isb
- ret
+
+0:b ArmEnableVFP // enable SIMD before entering C code
//UINTN
//ArmPlatformGetCorePosition (
|