diff options
| author | Michael Kinney <michael.d.kinney@intel.com> | 2015-11-05 00:01:45 +0000 |
|---|---|---|
| committer | mdkinney <mdkinney@Edk2> | 2015-11-05 00:01:45 +0000 |
| commit | c2e5e70a854552f91ae29e4b85dfc213dbaaca6d (patch) | |
| tree | 4b0bd14f3e3373cc8f0099b044491bc5eda8bdd8 | |
| parent | b9ffeab7b0856db6409b53efbba51b8c336b7491 (diff) | |
| download | edk2-c2e5e70a854552f91ae29e4b85dfc213dbaaca6d.tar.gz edk2-c2e5e70a854552f91ae29e4b85dfc213dbaaca6d.tar.bz2 edk2-c2e5e70a854552f91ae29e4b85dfc213dbaaca6d.zip | |
UefiCpuPkg: PiSmmCpuDxeSmm: Remove Framework compatibility
The PiSmmCpuDxeSmm module is using PcdFrameworkCompatibilitySupport to
provide compatibility with the SMM support in the IntelFrameworkPkg.
This change removes the Framework compatibility and requires all SMM
modules that provide SMI handlers to follow the PI Specification.
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18726 6f19259b-4bc3-4df7-8a09-765794883524
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 60 | ||||
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 1 | ||||
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 3 |
3 files changed, 8 insertions, 56 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c index c351875262..de681c0a30 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -76,13 +76,6 @@ EFI_SMM_CPU_PROTOCOL mSmmCpu = { EFI_CPU_INTERRUPT_HANDLER mExternalVectorTable[EXCEPTION_VECTOR_NUMBER];
-///
-/// SMM CPU Save State Protocol instance
-///
-EFI_SMM_CPU_SAVE_STATE_PROTOCOL mSmmCpuSaveState = {
- NULL
-};
-
//
// SMM stack information
//
@@ -530,18 +523,13 @@ SmmRestoreCpu ( }
//
- // Do below CPU things for native platform only
+ // Skip initialization if mAcpiCpuData is not valid
//
- if (!FeaturePcdGet(PcdFrameworkCompatibilitySupport)) {
+ if (mAcpiCpuData.NumberOfCpus > 0) {
//
- // Skip initialization if mAcpiCpuData is not valid
+ // First time microcode load and restore MTRRs
//
- if (mAcpiCpuData.NumberOfCpus > 0) {
- //
- // First time microcode load and restore MTRRs
- //
- EarlyInitializeCpu ();
- }
+ EarlyInitializeCpu ();
}
//
@@ -550,18 +538,13 @@ SmmRestoreCpu ( SmmRelocateBases ();
//
- // Do below CPU things for native platform only
+ // Skip initialization if mAcpiCpuData is not valid
//
- if (!FeaturePcdGet(PcdFrameworkCompatibilitySupport)) {
+ if (mAcpiCpuData.NumberOfCpus > 0) {
//
- // Skip initialization if mAcpiCpuData is not valid
+ // Restore MSRs for BSP and all APs
//
- if (mAcpiCpuData.NumberOfCpus > 0) {
- //
- // Restore MSRs for BSP and all APs
- //
- InitializeCpu ();
- }
+ InitializeCpu ();
}
//
@@ -687,13 +670,6 @@ SmmReadyToLockEventNotify ( mAcpiCpuData.NumberOfCpus = 0;
//
- // If FrameworkCompatibilitySspport is enabled, then do not copy CPU S3 Data into SMRAM
- //
- if (FeaturePcdGet (PcdFrameworkCompatibilitySupport)) {
- goto Done;
- }
-
- //
// If PcdCpuS3DataAddress was never set, then do not copy CPU S3 Data into SMRAM
//
AcpiCpuData = (ACPI_CPU_DATA *)(UINTN)PcdGet64 (PcdCpuS3DataAddress);
@@ -1009,7 +985,6 @@ PiCpuSmmEntry ( mSmmCpuPrivateData.SmmCoreEntryContext.CpuSaveStateSize = gSmmCpuPrivate->CpuSaveStateSize;
mSmmCpuPrivateData.SmmCoreEntryContext.CpuSaveState = gSmmCpuPrivate->CpuSaveState;
- mSmmCpuSaveState.CpuSaveState = (EFI_SMM_CPU_STATE **)gSmmCpuPrivate->CpuSaveState;
//
// Allocate buffer for pointers to array in CPU_HOT_PLUG_DATA.
@@ -1150,25 +1125,6 @@ PiCpuSmmEntry ( Status = InitializeSmmCpuServices (mSmmCpuHandle);
ASSERT_EFI_ERROR (Status);
- if (FeaturePcdGet (PcdFrameworkCompatibilitySupport)) {
- //
- // Install Framework SMM Save State Protocol into UEFI protocol database for backward compatibility
- //
- Status = SystemTable->BootServices->InstallMultipleProtocolInterfaces (
- &gSmmCpuPrivate->SmmCpuHandle,
- &gEfiSmmCpuSaveStateProtocolGuid,
- &mSmmCpuSaveState,
- NULL
- );
- ASSERT_EFI_ERROR (Status);
- //
- // The SmmStartupThisAp service in Framework SMST should always be non-null.
- // Update SmmStartupThisAp pointer in PI SMST here so that PI/Framework SMM thunk
- // can have it ready when constructing Framework SMST.
- //
- gSmst->SmmStartupThisAp = SmmStartupThisAp;
- }
-
//
// register SMM Ready To Lock Protocol notification
//
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h index 162bdadf0b..cfbf2ca6da 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -21,7 +21,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include <Protocol/SmmConfiguration.h>
#include <Protocol/SmmCpu.h>
#include <Protocol/SmmAccess2.h>
-#include <Protocol/SmmCpuSaveState.h>
#include <Protocol/SmmReadyToLock.h>
#include <Protocol/SmmCpuService.h>
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf index f559947ee4..a293a88e99 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf @@ -89,7 +89,6 @@ MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
UefiCpuPkg/UefiCpuPkg.dec
- IntelFrameworkPkg/IntelFrameworkPkg.dec
[LibraryClasses]
UefiDriverEntryPoint
@@ -126,7 +125,6 @@ gEfiSmmCpuProtocolGuid ## PRODUCES
gEfiSmmReadyToLockProtocolGuid ## NOTIFY
gEfiSmmCpuServiceProtocolGuid ## PRODUCES
- gEfiSmmCpuSaveStateProtocolGuid ## SOMETIMES_PRODUCES
[Guids]
gEfiAcpiVariableGuid ## SOMETIMES_CONSUMES ## HOB # it is used for S3 boot.
@@ -135,7 +133,6 @@ gEfiAcpi10TableGuid ## SOMETIMES_CONSUMES ## SystemTable
[FeaturePcd]
- gEfiMdeModulePkgTokenSpaceGuid.PcdFrameworkCompatibilitySupport ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmDebug ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmBlockStartupThisAp ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection ## CONSUMES
|