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author | rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-07-05 08:44:57 +0000 |
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committer | rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-07-05 08:44:57 +0000 |
commit | e768377c22bda1801ee3fb63e49390d69d83953b (patch) | |
tree | 17cb53d3327f666cff641ed5c63843791fc16b8c | |
parent | 8f8ca22e594e3a6c313f725fbc7e2b20d75c79fd (diff) | |
download | edk2-e768377c22bda1801ee3fb63e49390d69d83953b.tar.gz edk2-e768377c22bda1801ee3fb63e49390d69d83953b.tar.bz2 edk2-e768377c22bda1801ee3fb63e49390d69d83953b.zip |
UefiCpuPkg BaseUefiCpuLib: Change the initialization value for x87 FPU Control Word for x64 arch from 0x27f to 0x37f per UEFI 2.3.1c spec.
Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13506 6f19259b-4bc3-4df7-8a09-765794883524
-rw-r--r-- | UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S | 8 | ||||
-rw-r--r-- | UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm | 6 |
2 files changed, 7 insertions, 7 deletions
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S index 64750afb85..9c51772adc 100644 --- a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S +++ b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S @@ -1,6 +1,6 @@ #------------------------------------------------------------------------------ #* -#* Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR> +#* Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR> #* This program and the accompanying materials #* are licensed and made available under the terms and conditions of the BSD License #* which accompanies this distribution. The full text of the license may be found at @@ -15,8 +15,8 @@ # # Initializes floating point units for requirement of UEFI specification. # -# This function initializes floating-point control word to 0x027F (all exceptions -# masked,double-precision, round-to-nearest) and multimedia-extensions control word +# This function initializes floating-point control word to 0x037F (all exceptions +# masked,double-extended-precision, round-to-nearest) and multimedia-extensions control word # (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero # for masked underflow). # @@ -32,7 +32,7 @@ ASM_PFX(InitializeFloatingPointUnits): # Float control word initial value: # all exceptions masked, double-precision, round-to-nearest # - pushq $0x027F + pushq $0x037F lea (%rsp), %rax fldcw (%rax) popq %rax diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm index 0a036b6ae3..9cde66eecd 100644 --- a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm +++ b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm @@ -1,6 +1,6 @@ ;------------------------------------------------------------------------------
;*
-;* Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
+;* Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
;* This program and the accompanying materials
;* are licensed and made available under the terms and conditions of the BSD License
;* which accompanies this distribution. The full text of the license may be found at
@@ -16,9 +16,9 @@ .const
;
; Float control word initial value:
-; all exceptions masked, double-precision, round-to-nearest
+; all exceptions masked, double-extended-precision, round-to-nearest
;
-mFpuControlWord DW 027Fh
+mFpuControlWord DW 037Fh
;
; Multimedia-extensions control word:
; all exceptions masked, round-to-nearest, flush to zero for masked underflow
|