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authorOliver Smith-Denny <osde@linux.microsoft.com>2023-05-23 13:36:23 -0700
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2023-05-29 15:14:00 +0000
commit647cd40cf6658f52e0c6d4c356620a4dedd425ba (patch)
treeb5365fc5969caa1f15d8670a4091f93647042a6a
parent04c5b3023e49c35d291f41d2c39b4d12a62b8f9c (diff)
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ArmPkg/CpuDxe AARCH64: Report Memory Protection Attributes To GCD
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4463 When the AARCH64 CpuDxe attempts to SyncCacheConfig() with the GCD, it collects the page attributes as: EntryAttribute = Entry & TT_ATTR_INDX_MASK However, TT_ATTR_INDX_MASK only masks the cacheability attributes and drops the memory protections attributes. Importantly, it also drops the TT_AF (access flag) which is now wired up in EDK2 to represent EFI_MEMORY_RP, so by default all SystemMem pages will report as EFI_MEMORY_RP to the GCD. The GCD currently drops that silently, because the Capabilities field in the GCD does not support EFI_MEMORY_RP by default. However, some ranges may support EFI_MEMORY_RP and incorrectly mark those ranges as read protected. In conjunction with another change on the mailing list (see: https://edk2.groups.io/g/devel/topic/98505340), this causes an access flag fault incorrectly. See the linked BZ below for full details. This patch exposes all memory protections attributes to the GCD layer so it can correctly set pages as EFI_MEMORY[RP|XP|RO] when it initially syncs. Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Taylor Beebe <t@taylorbeebe.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
-rw-r--r--ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
index 0859c7418a..1d02e41e18 100644
--- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
@@ -120,7 +120,7 @@ GetFirstPageAttribute (
} else if (((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) ||
((TableLevel == 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3)))
{
- return FirstEntry & TT_ATTR_INDX_MASK;
+ return FirstEntry & TT_ATTRIBUTES_MASK;
} else {
return INVALID_ENTRY;
}
@@ -158,7 +158,7 @@ GetNextEntryAttribute (
for (Index = 0; Index < EntryCount; Index++) {
Entry = TableAddress[Index];
EntryType = Entry & TT_TYPE_MASK;
- EntryAttribute = Entry & TT_ATTR_INDX_MASK;
+ EntryAttribute = Entry & TT_ATTRIBUTES_MASK;
// If Entry is a Table Descriptor type entry then go through the sub-level table
if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||