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| author | Ruiyu Ni <ruiyu.ni@intel.com> | 2016-02-17 18:06:36 +0800 |
|---|---|---|
| committer | Ruiyu Ni <ruiyu.ni@intel.com> | 2016-02-29 10:19:57 +0800 |
| commit | 7b0a1ead7d2efa7f9eae4c2b254ff154d9c5f74f (patch) | |
| tree | 2145934f1af7e9fa030d4b44c7bfc1a36b431404 | |
| parent | e90f51a822c319b0e36bf55e260684239da325b4 (diff) | |
| download | edk2-7b0a1ead7d2efa7f9eae4c2b254ff154d9c5f74f.tar.gz edk2-7b0a1ead7d2efa7f9eae4c2b254ff154d9c5f74f.tar.bz2 edk2-7b0a1ead7d2efa7f9eae4c2b254ff154d9c5f74f.zip | |
MdeModuelPkg/PciBus: Return AddrTranslationOffset in GetBarAttributes
Some platform doesn't use CPU(HOST)/Device 1:1 mapping for PCI Bus.
But PCI IO doesn't have interface to tell caller (device driver)
whether the address returned by GetBarAttributes() is HOST address
or device address.
UEFI Spec 2.6 addresses this issue by clarifying the address returned
is HOST address and caller can use AddrTranslationOffset to calculate
the device address.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
| -rw-r--r-- | MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c index 334a6ac309..f72598d3ae 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c @@ -1744,6 +1744,53 @@ PciIoAttributes ( }
/**
+ Retrieve the AddrTranslationOffset from RootBridgeIo for the
+ specified range.
+
+ @param RootBridgeIo Root Bridge IO instance.
+ @param AddrRangeMin The base address of the MMIO.
+ @param AddrLen The length of the MMIO.
+
+ @retval The AddrTranslationOffset from RootBridgeIo for the
+ specified range, or (UINT64) -1 if the range is not
+ found in RootBridgeIo.
+**/
+UINT64
+GetMmioAddressTranslationOffset (
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *RootBridgeIo,
+ UINT64 AddrRangeMin,
+ UINT64 AddrLen
+ )
+{
+ EFI_STATUS Status;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration;
+
+ Status = RootBridgeIo->Configuration (
+ RootBridgeIo,
+ (VOID **) &Configuration
+ );
+ if (EFI_ERROR (Status)) {
+ return (UINT64) -1;
+ }
+
+ while (Configuration->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
+ if ((Configuration->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) &&
+ (Configuration->AddrRangeMin <= AddrRangeMin) &&
+ (Configuration->AddrRangeMin + Configuration->AddrLen >= AddrRangeMin + AddrLen)
+ ) {
+ return Configuration->AddrTranslationOffset;
+ }
+ Configuration++;
+ }
+
+ //
+ // The resource occupied by BAR should be in the range reported by RootBridge.
+ //
+ ASSERT (FALSE);
+ return (UINT64) -1;
+}
+
+/**
Gets the attributes that this PCI controller supports setting on a BAR using
SetBarAttributes(), and retrieves the list of resource descriptors for a BAR.
@@ -1867,6 +1914,21 @@ PciIoGetBarAttributes ( End = (EFI_ACPI_END_TAG_DESCRIPTOR *) (Descriptor + 1);
End->Desc = ACPI_END_TAG_DESCRIPTOR;
End->Checksum = 0;
+
+ //
+ // Get the Address Translation Offset
+ //
+ if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
+ Descriptor->AddrTranslationOffset = GetMmioAddressTranslationOffset (
+ PciIoDevice->PciRootBridgeIo,
+ Descriptor->AddrRangeMin,
+ Descriptor->AddrLen
+ );
+ if (Descriptor->AddrTranslationOffset == (UINT64) -1) {
+ FreePool (Descriptor);
+ return EFI_UNSUPPORTED;
+ }
+ }
}
return EFI_SUCCESS;
|