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author | Kun Qin <kuqin@microsoft.com> | 2021-08-20 20:49:04 +0000 |
---|---|---|
committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-11-12 01:07:12 +0000 |
commit | 961a9e1d76cdb3a56ac2eecc480492c18c1ab927 (patch) | |
tree | b5c87322587dd1c0db747bb2993c4d525137d1d4 | |
parent | b904377d0d54a784f9a9348d05088afc80de5c54 (diff) | |
download | edk2-961a9e1d76cdb3a56ac2eecc480492c18c1ab927.tar.gz edk2-961a9e1d76cdb3a56ac2eecc480492c18c1ab927.tar.bz2 edk2-961a9e1d76cdb3a56ac2eecc480492c18c1ab927.zip |
MdePkg: Added definition of AMD specific public MSRs
Added definition of AMD specific public MSRs:
1. SMBASE
2. SMM_ADDR
3. SMM_MASK
Signed-off-by: Kun Qin <kuqin@microsoft.com>
-rw-r--r-- | MdePkg/Include/Register/Amd/ArchitecturalMsr.h | 55 | ||||
-rw-r--r-- | MdePkg/Include/Register/Amd/Msr.h | 1 |
2 files changed, 56 insertions, 0 deletions
diff --git a/MdePkg/Include/Register/Amd/ArchitecturalMsr.h b/MdePkg/Include/Register/Amd/ArchitecturalMsr.h new file mode 100644 index 0000000000..369009f9db --- /dev/null +++ b/MdePkg/Include/Register/Amd/ArchitecturalMsr.h @@ -0,0 +1,55 @@ +/** @file ArchitecturalMsr.h
+ AMD Architectural MSR Definitions.
+
+ Provides defines for Machine Specific Registers(MSR) indexes.
+
+ Copyright (c) Microsoft Corporation.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ AMD64 Architecture Programmer’s Manual, Volumes 2
+ Rev. 3.37, Volume 2: System Programming
+
+**/
+
+#ifndef AMD_ARCHITECTURAL_MSR_H_
+#define AMD_ARCHITECTURAL_MSR_H_
+
+/*
+ See Appendix A.8, "System Management Mode MSR Cross-Reference".
+
+ SMBASE MSR that contains the SMRAM base address.
+ Reset value: 0000_0000_0003_0000h
+
+*/
+#define AMD_64_SMM_BASE 0xC0010111
+
+/*
+ See Appendix A.8, "System Management Mode MSR Cross-Reference".
+
+ SMM_ADDR Contains the base address of protected
+ memory for the SMM Handler.
+
+ Specific usage, see AMD64 Architecture Programmer’s Manual,
+ Volumes 2 (Rev. 3.37), Section 10.2.5
+
+ Reset value: 0000_0000_0000_0000h
+
+*/
+#define AMD_64_SMM_ADDR 0xC0010112
+
+/*
+ See Appendix A.8, "System Management Mode MSR Cross-Reference".
+
+ SMM_MASK Contains a mask which determines the size of
+ the protected area for the SMM handler.
+
+ Specific usage, see AMD64 Architecture Programmer’s Manual,
+ Volumes 2 (Rev. 3.37), Section 10.2.5
+
+ Reset value: 0000_0000_0000_0000h
+
+*/
+#define AMD_64_SMM_MASK 0xC0010113
+
+#endif // AMD_ARCHITECTURAL_MSR_H_
diff --git a/MdePkg/Include/Register/Amd/Msr.h b/MdePkg/Include/Register/Amd/Msr.h index 352b1f8f1c..7ec208c769 100644 --- a/MdePkg/Include/Register/Amd/Msr.h +++ b/MdePkg/Include/Register/Amd/Msr.h @@ -18,6 +18,7 @@ #define AMD_MSR_H_
#include <Register/Intel/ArchitecturalMsr.h>
+#include <Register/Amd/ArchitecturalMsr.h>
#include <Register/Amd/SevSnpMsr.h>
#include <Register/Amd/SvsmMsr.h>
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