UefiCpuPkg: Add BaseRiscV64CpuTimerLib library

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

Add the RISC-V instance of the TimerLib.

This is mostly copied from
edk2-platforms/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Daniel Schaefer <git@danielschaefer.me>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Acked-by: Ray Ni <ray.ni@Intel.com>

4 files changed, 247 insertions, 0 deletions

diff --git a/UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf b/UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf
new file mode 100644
index 0000000000..3d5eaa4171
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf
@@ -0,0 +1,33 @@
+## @file

+# RISC-V Base CPU Timer Library Instance

+#

+#  Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>

+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.<BR>

+#

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+##

+

+[Defines]

+  INF_VERSION                    = 0x0001001B

+  BASE_NAME                      = BaseRisV64CpuTimerLib

+  FILE_GUID                      = B635A600-EA24-4199-88E8-5761EEA96A51

+  MODULE_TYPE                    = BASE

+  VERSION_STRING                 = 1.0

+  LIBRARY_CLASS                  = TimerLib

+  MODULE_UNI_FILE                = BaseRisV64CpuTimerLib.uni

+

+[Sources]

+  CpuTimerLib.c

+

+[Packages]

+  MdePkg/MdePkg.dec

+  UefiCpuPkg/UefiCpuPkg.dec

+

+[LibraryClasses]

+  BaseLib

+  PcdLib

+  DebugLib

+

+[Pcd]

+  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES

diff --git a/UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.uni b/UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.uni
new file mode 100644
index 0000000000..bb061f9a8f
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.uni
@@ -0,0 +1,14 @@
+// /** @file

+// Base CPU Timer Library for RISC-V

+//

+// Copyright (c) 2023, Ventana Micro Systems Inc. All rights reserved.<BR>

+//

+// SPDX-License-Identifier: BSD-2-Clause-Patent

+//

+// **/

+

+

+#string STR_MODULE_ABSTRACT             #language en-US "RISC-V CPU Timer Library"

+

+#string STR_MODULE_DESCRIPTION          #language en-US "Provides basic timer support for RISC-V."

+

diff --git a/UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/CpuTimerLib.c b/UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/CpuTimerLib.c
new file mode 100644
index 0000000000..9c8efc0f35
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/CpuTimerLib.c
@@ -0,0 +1,199 @@
+/** @file

+  RISC-V instance of Timer Library.

+

+  Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>

+

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include <Uefi.h>

+#include <Library/BaseLib.h>

+#include <Library/DebugLib.h>

+#include <Library/PcdLib.h>

+#include <Register/RiscV64/RiscVImpl.h>

+

+/**

+  Stalls the CPU for at least the given number of ticks.

+

+  Stalls the CPU for at least the given number of ticks. It's invoked by

+  MicroSecondDelay() and NanoSecondDelay().

+

+  @param  Delay     A period of time to delay in ticks.

+

+**/

+VOID

+InternalRiscVTimerDelay (

+  IN UINT32  Delay

+  )

+{

+  UINT32  Ticks;

+  UINT32  Times;

+

+  Times  = Delay >> (RISCV_TIMER_COMPARE_BITS - 2);

+  Delay &= ((1 << (RISCV_TIMER_COMPARE_BITS - 2)) - 1);

+  do {

+    //

+    // The target timer count is calculated here

+    //

+    Ticks = RiscVReadTimer () + Delay;

+    Delay = 1 << (RISCV_TIMER_COMPARE_BITS - 2);

+    while (((Ticks - RiscVReadTimer ()) & (1 << (RISCV_TIMER_COMPARE_BITS - 1))) == 0) {

+      CpuPause ();

+    }

+  } while (Times-- > 0);

+}

+

+/**

+  Stalls the CPU for at least the given number of microseconds.

+

+  Stalls the CPU for the number of microseconds specified by MicroSeconds.

+

+  @param  MicroSeconds  The minimum number of microseconds to delay.

+

+  @return MicroSeconds

+

+**/

+UINTN

+EFIAPI

+MicroSecondDelay (

+  IN UINTN  MicroSeconds

+  )

+{

+  InternalRiscVTimerDelay (

+    (UINT32)DivU64x32 (

+              MultU64x32 (

+                MicroSeconds,

+                PcdGet64 (PcdCpuCoreCrystalClockFrequency)

+                ),

+              1000000u

+              )

+    );

+  return MicroSeconds;

+}

+

+/**

+  Stalls the CPU for at least the given number of nanoseconds.

+

+  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.

+

+  @param  NanoSeconds The minimum number of nanoseconds to delay.

+

+  @return NanoSeconds

+

+**/

+UINTN

+EFIAPI

+NanoSecondDelay (

+  IN UINTN  NanoSeconds

+  )

+{

+  InternalRiscVTimerDelay (

+    (UINT32)DivU64x32 (

+              MultU64x32 (

+                NanoSeconds,

+                PcdGet64 (PcdCpuCoreCrystalClockFrequency)

+                ),

+              1000000000u

+              )

+    );

+  return NanoSeconds;

+}

+

+/**

+  Retrieves the current value of a 64-bit free running performance counter.

+

+  Retrieves the current value of a 64-bit free running performance counter. The

+  counter can either count up by 1 or count down by 1. If the physical

+  performance counter counts by a larger increment, then the counter values

+  must be translated. The properties of the counter can be retrieved from

+  GetPerformanceCounterProperties().

+

+  @return The current value of the free running performance counter.

+

+**/

+UINT64

+EFIAPI

+GetPerformanceCounter (

+  VOID

+  )

+{

+  return (UINT64)RiscVReadTimer ();

+}

+

+/**return

+  Retrieves the 64-bit frequency in Hz and the range of performance counter

+  values.

+

+  If StartValue is not NULL, then the value that the performance counter starts

+  with immediately after is it rolls over is returned in StartValue. If

+  EndValue is not NULL, then the value that the performance counter end with

+  immediately before it rolls over is returned in EndValue. The 64-bit

+  frequency of the performance counter in Hz is always returned. If StartValue

+  is less than EndValue, then the performance counter counts up. If StartValue

+  is greater than EndValue, then the performance counter counts down. For

+  example, a 64-bit free running counter that counts up would have a StartValue

+  of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter

+  that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.

+

+  @param  StartValue  The value the performance counter starts with when it

+                      rolls over.

+  @param  EndValue    The value that the performance counter ends with before

+                      it rolls over.

+

+  @return The frequency in Hz.

+

+**/

+UINT64

+EFIAPI

+GetPerformanceCounterProperties (

+  OUT      UINT64 *StartValue, OPTIONAL

+  OUT      UINT64                    *EndValue     OPTIONAL

+  )

+{

+  if (StartValue != NULL) {

+    *StartValue = 0;

+  }

+

+  if (EndValue != NULL) {

+    *EndValue = 32 - 1;

+  }

+

+  return PcdGet64 (PcdCpuCoreCrystalClockFrequency);

+}

+

+/**

+  Converts elapsed ticks of performance counter to time in nanoseconds.

+

+  This function converts the elapsed ticks of running performance counter to

+  time value in unit of nanoseconds.

+

+  @param  Ticks     The number of elapsed ticks of running performance counter.

+

+  @return The elapsed time in nanoseconds.

+

+**/

+UINT64

+EFIAPI

+GetTimeInNanoSecond (

+  IN      UINT64  Ticks

+  )

+{

+  UINT64  NanoSeconds;

+  UINT32  Remainder;

+

+  //

+  //          Ticks

+  // Time = --------- x 1,000,000,000

+  //        Frequency

+  //

+  NanoSeconds = MultU64x32 (DivU64x32Remainder (Ticks, PcdGet64 (PcdCpuCoreCrystalClockFrequency), &Remainder), 1000000000u);

+

+  //

+  // Frequency < 0x100000000, so Remainder < 0x100000000, then (Remainder * 1,000,000,000)

+  // will not overflow 64-bit.

+  //

+  NanoSeconds += DivU64x32 (MultU64x32 ((UINT64)Remainder, 1000000000u), PcdGet64 (PcdCpuCoreCrystalClockFrequency));

+

+  return NanoSeconds;

+}

diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index 35e66d93ef..c511403842 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -197,6 +197,7 @@
 

 [Components.RISCV64]

   UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf

+  UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLib.inf

 

 [BuildOptions]

   *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES