diff options
| author | Sunil V L <sunilvl@ventanamicro.com> | 2023-01-27 15:27:54 +0530 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2023-02-16 05:53:28 +0000 |
| commit | d6017bca19c4c716c5c672e8de2f67658184b6f2 (patch) | |
| tree | be35422287c4fa8304a3facd6b75689655b81e73 | |
| parent | 76e956547eafc88a46c7620d0fb128d4e10b1c64 (diff) | |
| download | edk2-d6017bca19c4c716c5c672e8de2f67658184b6f2.tar.gz edk2-d6017bca19c4c716c5c672e8de2f67658184b6f2.tar.bz2 edk2-d6017bca19c4c716c5c672e8de2f67658184b6f2.zip | |
UefiCpuPkg: Add RISCV_EFI_BOOT_PROTOCOL related definitions
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076
RISC-V UEFI based platforms need to support RISCV_EFI_BOOT_PROTOCOL.
Add this protocol GUID definition and the header file required.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Daniel Schaefer <git@danielschaefer.me>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Acked-by: Ray Ni <ray.ni@intel.com>
| -rw-r--r-- | UefiCpuPkg/Include/Protocol/RiscVBootProtocol.h | 34 | ||||
| -rw-r--r-- | UefiCpuPkg/UefiCpuPkg.dec | 7 |
2 files changed, 41 insertions, 0 deletions
diff --git a/UefiCpuPkg/Include/Protocol/RiscVBootProtocol.h b/UefiCpuPkg/Include/Protocol/RiscVBootProtocol.h new file mode 100644 index 0000000000..ed223b852d --- /dev/null +++ b/UefiCpuPkg/Include/Protocol/RiscVBootProtocol.h @@ -0,0 +1,34 @@ +/** @file
+ RISC-V Boot Protocol mandatory for RISC-V UEFI platforms.
+
+ @par Revision Reference:
+ The protocol specification can be found at
+ https://github.com/riscv-non-isa/riscv-uefi
+
+ Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef RISCV_BOOT_PROTOCOL_H_
+#define RISCV_BOOT_PROTOCOL_H_
+
+typedef struct _RISCV_EFI_BOOT_PROTOCOL RISCV_EFI_BOOT_PROTOCOL;
+
+#define RISCV_EFI_BOOT_PROTOCOL_REVISION 0x00010000
+#define RISCV_EFI_BOOT_PROTOCOL_LATEST_VERSION \
+ RISCV_EFI_BOOT_PROTOCOL_REVISION
+
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_BOOT_HARTID)(
+ IN RISCV_EFI_BOOT_PROTOCOL *This,
+ OUT UINTN *BootHartId
+ );
+
+typedef struct _RISCV_EFI_BOOT_PROTOCOL {
+ UINT64 Revision;
+ EFI_GET_BOOT_HARTID GetBootHartId;
+} RISCV_EFI_BOOT_PROTOCOL;
+
+#endif
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index cff239d528..903ad52da9 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -86,6 +86,13 @@ ## Include/Protocol/SmMonitorInit.h
gEfiSmMonitorInitProtocolGuid = { 0x228f344d, 0xb3de, 0x43bb, { 0xa4, 0xd7, 0xea, 0x20, 0xb, 0x1b, 0x14, 0x82 }}
+[Protocols.RISCV64]
+ #
+ # Protocols defined for RISC-V systems
+ #
+ ## Include/Protocol/RiscVBootProtocol.h
+ gRiscVEfiBootProtocolGuid = { 0xccd15fec, 0x6f73, 0x4eec, { 0x83, 0x95, 0x3e, 0x69, 0xe4, 0xb9, 0x40, 0xbf }}
+
#
# [Error.gUefiCpuPkgTokenSpaceGuid]
# 0x80000001 | Invalid value provided.
|