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authorSami Mujawar <sami.mujawar@arm.com>2021-06-07 14:38:18 +0100
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2023-06-01 15:52:01 +0000
commit08a08129ae134e2906e7478037cc2e1ddadad129 (patch)
treeb8821b16fa3ecf5e89b1833258d52fdf7e6d8163
parent7f198321eec0f520373261a15b6d0922906d06bc (diff)
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ArmPkg: Typecast IntID to UINT32 in ArmGicV2EndOfInterrupt
The EIOR register of the Gic CPU interface is a 32 bit register. However, the HARDWARE_INTERRUPT_SOURCE used to represent the interrupt source (Interrupt ID) is typedefed as UINTN, see EmbeddedPkg\Include\Protocol\HardwareInterrupt.h Therfore, typecast the interrupt ID (Source) value to UINT32 before setting the EOIR register. Also, add an assert to check that the value does not exceed 32 bits. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
-rw-r--r--ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c
index f403bec367..d21caa90e5 100644
--- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c
+++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c
@@ -1,12 +1,13 @@
/** @file
*
-* Copyright (c) 2013-2014, ARM Limited. All rights reserved.
+* Copyright (c) 2013-2023, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#include <Library/ArmGicLib.h>
+#include <Library/DebugLib.h>
#include <Library/IoLib.h>
UINTN
@@ -26,5 +27,6 @@ ArmGicV2EndOfInterrupt (
IN UINTN Source
)
{
- MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source);
+ ASSERT (Source <= MAX_UINT32);
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, (UINT32)Source);
}