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| author | Zhiguang Liu <zhiguang.liu@intel.com> | 2023-07-07 16:41:14 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2023-09-18 02:39:25 +0000 |
| commit | dea6002d6e612ee3066fc755b5ad47558d84d645 (patch) | |
| tree | dac8d7f61f211b80db7022ff1fa20f9eaa8d7c12 | |
| parent | 718cf21a5a1dab6184cd83d2323236ae69e178e8 (diff) | |
| download | edk2-dea6002d6e612ee3066fc755b5ad47558d84d645.tar.gz edk2-dea6002d6e612ee3066fc755b5ad47558d84d645.tar.bz2 edk2-dea6002d6e612ee3066fc755b5ad47558d84d645.zip | |
OvmfPkg: Remove applicationProcessorEntryPoint
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4494
Current reset vector uses 0xffffffe0 as AP waking vector, and expects
GenFv generates code aligned on a 4k boundary which will jump to this
location. However, some issues are listed below
1. GenFV doesn't generate code as the comment expects, because GenFv
assumes no modifications are required to the VTF-0 'Volume Top File'.
2. Even if removing VFT0 signature and let GenFv to modify, Genfv is
hard-code using another flash address 0xffffffd0.
3. In the same patch series, AP waking vector code is removed from
GenFv, because no such usage anymore. The existing of first two issues
also approve the usage is not available for a long time.
Therefore, remove AP waking vector related code.
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien@xen.org>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Acked-by: Anthony PERARD <anthony.perard@citrix.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
| -rw-r--r-- | OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm | 15 | ||||
| -rw-r--r-- | OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm | 16 |
2 files changed, 6 insertions, 25 deletions
diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm index 12f2cedd67..8f94da89f7 100644 --- a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm +++ b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm @@ -160,22 +160,13 @@ guidedStructureEnd: ALIGN 16
-applicationProcessorEntryPoint:
;
-; Application Processors entry point
+; 0xffffffe0
;
-; GenFv generates code aligned on a 4k boundary which will jump to this
-; location. (0xffffffe0) This allows the Local APIC Startup IPI to be
-; used to wake up the application processors.
-;
- jmp EarlyApInitReal16
-
-ALIGN 8
-
- DD 0
+ DD 0, 0, 0
;
-; The VTF signature
+; The VTF signature (0xffffffec)
;
; VTF-0 means that the VTF (Volume Top File) code does not require
; any fixups.
diff --git a/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm index 56749bdbc9..67156d8252 100644 --- a/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm +++ b/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm @@ -39,23 +39,13 @@ xenPVHEntryPoint: BITS 16
ALIGN 16
-
-applicationProcessorEntryPoint:
-;
-; Application Processors entry point
;
-; GenFv generates code aligned on a 4k boundary which will jump to this
-; location. (0xffffffe0) This allows the Local APIC Startup IPI to be
-; used to wake up the application processors.
+; 0xffffffe0
;
- jmp EarlyApInitReal16
-
-ALIGN 8
-
- DD 0
+ DD 0, 0, 0
;
-; The VTF signature
+; The VTF signature (0xffffffec)
;
; VTF-0 means that the VTF (Volume Top File) code does not require
; any fixups.
|