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| author | Andrei Warkentin <andrei.warkentin@intel.com> | 2023-09-19 03:16:59 -0500 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2023-09-21 04:57:57 +0000 |
| commit | ea628f28e59849ee7b91e6660c0ecd1a5c6e0884 (patch) | |
| tree | 4cbc4864f69c547ffd5f7d16f9f6c3760cccb685 | |
| parent | 89dad77cfbffda0303383a11026d854008c1b731 (diff) | |
| download | edk2-ea628f28e59849ee7b91e6660c0ecd1a5c6e0884.tar.gz edk2-ea628f28e59849ee7b91e6660c0ecd1a5c6e0884.tar.bz2 edk2-ea628f28e59849ee7b91e6660c0ecd1a5c6e0884.zip | |
RISCV: Fix InternalLongJump to return correct value
InternalLongJump was not returning the 2nd parameter passed
to LongJmp (Value) as the return value from SetJmp.
Seen with code compiled with -Os, where an LongJmp (Buffer, -1)
somehow translated to SetJmp returning 0...
Cc: Yong Li <yong.li@intel.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Tuan Phan <tphan@ventanamicro.com>
Cc: Daniel Schaefer <git@danielschaefer.me>
Signed-off-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
| -rw-r--r-- | MdePkg/Library/BaseLib/RiscV64/RiscVSetJumpLongJump.S | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/MdePkg/Library/BaseLib/RiscV64/RiscVSetJumpLongJump.S b/MdePkg/Library/BaseLib/RiscV64/RiscVSetJumpLongJump.S index 34486eabba..e97a7d0727 100644 --- a/MdePkg/Library/BaseLib/RiscV64/RiscVSetJumpLongJump.S +++ b/MdePkg/Library/BaseLib/RiscV64/RiscVSetJumpLongJump.S @@ -3,6 +3,7 @@ // Set/Long jump for RISC-V
//
// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+// Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
@@ -47,9 +48,5 @@ InternalLongJump: REG_L s10, 11*SZREG(a0)
REG_L s11, 12*SZREG(a0)
REG_L sp, 13*SZREG(a0)
-
- add a0, s0, 0
- add a1, s1, 0
- add a2, s2, 0
- add a3, s3, 0
+ mv a0, a1
ret
|