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authorTuan Phan <tphan@ventanamicro.com>2023-07-14 12:08:18 -0700
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2023-07-15 14:10:18 +0000
commit7178047402c07d369a2a3a0b0e5118c5e3d90ddc (patch)
treecb1efd041ac7c22e630fd4d8f595d3ee7c6a61ff
parente674096accc8e57cd0dd84679905e1222423251e (diff)
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MdePkg/BaseLib: RISC-V: Support getting satp register value
Add an API to retrieve satp register value. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
-rw-r--r--MdePkg/Include/Library/BaseLib.h5
-rw-r--r--MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S8
2 files changed, 13 insertions, 0 deletions
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 8f2df76c29..5d7067ee85 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -182,6 +182,11 @@ RiscVSetSupervisorAddressTranslationRegister (
);
UINT64
+RiscVGetSupervisorAddressTranslationRegister (
+ VOID
+ );
+
+UINT64
RiscVReadTimer (
VOID
);
diff --git a/MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S b/MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S
index ac8f92f38a..c9cf60c166 100644
--- a/MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S
+++ b/MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S
@@ -21,3 +21,11 @@
ASM_FUNC (RiscVSetSupervisorAddressTranslationRegister)
csrw CSR_SATP, a0
ret
+
+//
+// Get the value of Supervisor Address Translation and
+// Protection Register.
+//
+ASM_FUNC (RiscVGetSupervisorAddressTranslationRegister)
+ csrr a0, CSR_SATP
+ ret