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author | Feng Tian <feng.tian@intel.com> | 2014-11-10 05:46:21 +0000 |
---|---|---|
committer | erictian <erictian@Edk2> | 2014-11-10 05:46:21 +0000 |
commit | 1ff1dd0ff97b05bf88e50120ba49b435601d5ee8 (patch) | |
tree | 8f4029eb16e8ff7ab63c0d7b2b8b3797d8f4b993 | |
parent | 33985e3b52ee2e4b5064331134d983e55a7da904 (diff) | |
download | edk2-1ff1dd0ff97b05bf88e50120ba49b435601d5ee8.tar.gz edk2-1ff1dd0ff97b05bf88e50120ba49b435601d5ee8.tar.bz2 edk2-1ff1dd0ff97b05bf88e50120ba49b435601d5ee8.zip |
MdeModulePkg/AtaAtapiPassThru: don't write read-only AHCI MMIO register
Per AHCI 1.1 spec, AE bit of GHC register is read-only if CAP.SAM is 1
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16321 6f19259b-4bc3-4df7-8a09-765794883524
-rw-r--r-- | MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c | 27 | ||||
-rw-r--r-- | MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h | 3 |
2 files changed, 22 insertions, 8 deletions
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c index 72b1e5cc7e..186d40c062 100644 --- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c @@ -1440,8 +1440,19 @@ AhciReset ( {
UINT64 Delay;
UINT32 Value;
+ UINT32 Capability;
- AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE);
+ //
+ // Collect AHCI controller information
+ //
+ Capability = AhciReadReg (PciIo, EFI_AHCI_CAPABILITY_OFFSET);
+
+ //
+ // Enable AE before accessing any AHCI registers if Supports AHCI Mode Only is not set
+ //
+ if ((Capability & EFI_AHCI_CAP_SAM) == 0) {
+ AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE);
+ }
AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_RESET);
@@ -2245,15 +2256,17 @@ AhciModeInitialization ( }
//
- // Enable AE before accessing any AHCI registers
+ // Collect AHCI controller information
//
- AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE);
-
+ Capability = AhciReadReg (PciIo, EFI_AHCI_CAPABILITY_OFFSET);
+
//
- // Collect AHCI controller information
+ // Enable AE before accessing any AHCI registers if Supports AHCI Mode Only is not set
//
- Capability = AhciReadReg(PciIo, EFI_AHCI_CAPABILITY_OFFSET);
-
+ if ((Capability & EFI_AHCI_CAP_SAM) == 0) {
+ AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE);
+ }
+
//
// Get the number of command slots per port supported by this HBA.
//
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h index 485b64799e..6401fb2e9f 100644 --- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h @@ -1,7 +1,7 @@ /** @file
Header file for AHCI mode of ATA host controller.
- Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -17,6 +17,7 @@ #define EFI_AHCI_BAR_INDEX 0x05
#define EFI_AHCI_CAPABILITY_OFFSET 0x0000
+#define EFI_AHCI_CAP_SAM BIT18
#define EFI_AHCI_CAP_SSS BIT27
#define EFI_AHCI_CAP_S64A BIT31
#define EFI_AHCI_GHC_OFFSET 0x0004
|