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| author | Michael Kinney <michael.d.kinney@intel.com> | 2015-04-27 19:49:25 +0000 |
|---|---|---|
| committer | mdkinney <mdkinney@Edk2> | 2015-04-27 19:49:25 +0000 |
| commit | d5203c10e83d3b8967ae2f47a78d649299a92a27 (patch) | |
| tree | 130e0ec1a417b1cc5fc355cabb6a607bac5fed23 | |
| parent | e9cd66d0859f63ec6aab2b1ac863fe72b65fe474 (diff) | |
| download | edk2-d5203c10e83d3b8967ae2f47a78d649299a92a27.tar.gz edk2-d5203c10e83d3b8967ae2f47a78d649299a92a27.tar.bz2 edk2-d5203c10e83d3b8967ae2f47a78d649299a92a27.zip | |
MdePkg/DebugAgent: Support IA32 processors without MSR_IA32_APIC_BASE_ADDRESS
Avoid use of Local APIC Base Address MSR (MSR_IA32_APIC_BASE_ADDRESS) if there is only 1 CPU present.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17218 6f19259b-4bc3-4df7-8a09-765794883524
| -rw-r--r-- | SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugMp.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugMp.c b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugMp.c index 6ae9deef10..bdb6742811 100644 --- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugMp.c +++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugMp.c @@ -1,7 +1,7 @@ /** @file
Multi-Processor support functions implementation.
- Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -138,9 +138,18 @@ GetProcessorIndex ( **/
BOOLEAN
IsBsp (
- IN UINT32 ProcessorIndex
+ IN UINT32 ProcessorIndex
)
{
+ //
+ // If there are less than 2 CPUs detected, then the currently executing CPU
+ // must be the BSP. This avoids an access to an MSR that may not be supported
+ // on single core CPUs.
+ //
+ if (mDebugCpuData.CpuCount < 2) {
+ return TRUE;
+ }
+
if (AsmMsrBitFieldRead64 (MSR_IA32_APIC_BASE_ADDRESS, 8, 8) == 1) {
if (mDebugMpContext.BspIndex != ProcessorIndex) {
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
|