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authorLaszlo Ersek <lersek@redhat.com>2019-05-29 11:59:02 +0200
committerLaszlo Ersek <lersek@redhat.com>2019-06-03 19:54:34 +0200
commitb07de0974b65a6a393c2d477427d1d6c7acce002 (patch)
treea172afc620bccebde3fe9bac57825b7f660bb4c9
parentd4534984111328ff839fbf51be2779a98bfefa30 (diff)
downloadedk2-b07de0974b65a6a393c2d477427d1d6c7acce002.tar.gz
edk2-b07de0974b65a6a393c2d477427d1d6c7acce002.tar.bz2
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OvmfPkg: raise the PCIEXBAR base to 2816 MB on Q35
(This is a replacement for commit 75136b29541b, "OvmfPkg/PlatformPei: reorder the 32-bit PCI window vs. the PCIEXBAR on q35", 2019-05-16). Commit 7b8fe63561b4 ("OvmfPkg: PlatformPei: enable PCIEXBAR (aka MMCONFIG / ECAM) on Q35", 2016-03-10) claimed that, On Q35 machine types that QEMU intends to support in the long term, QEMU never lets the RAM below 4 GB exceed 2 GB. Alas, this statement came from a misunderstanding that occurred while we worked out the interface contract. In fact QEMU does allow the 32-bit RAM extend up to 0xB000_0000 (exclusive), in case the RAM size falls in the range (0x8000_0000, 0xB000_0000) (i.e., the RAM size is greater than 2048MB and smaller than 2816MB). In turn, such a RAM size (justifiedly) triggers ASSERT (TopOfLowRam <= PciExBarBase); in MemMapInitialization(), because we placed the 256MB PCIEXBAR at 0x8000_0000 (2GB) exactly, relying on the interface contract. (And, the 32-bit PCI window would follow the PCIEXBAR, covering the [0x9000_0000, 0xFC00_0000) range.) In order to fix this, place the PCIEXBAR at 2816MB (0xB000_0000), and start the 32-bit PCI window at 3 GB (0xC000_0000). This shrinks the 32-bit PCI window to 0xFC00_0000 - 0xC000_0000 = 0x3C00_0000 = 960 MB. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
-rw-r--r--OvmfPkg/OvmfPkgIa32.dsc4
-rw-r--r--OvmfPkg/OvmfPkgIa32X64.dsc4
-rw-r--r--OvmfPkg/OvmfPkgX64.dsc4
3 files changed, 6 insertions, 6 deletions
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 578fc6c98e..e74a9d5a51 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -492,8 +492,8 @@
# the PCIEXBAR register.
#
# On Q35 machine types that QEMU intends to support in the long term, QEMU
- # never lets the RAM below 4 GB exceed 2 GB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x80000000
+ # never lets the RAM below 4 GB exceed 2816 MB.
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
!ifdef $(SOURCE_DEBUG_ENABLE)
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index eade8f62d3..67ac015991 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -497,8 +497,8 @@
# the PCIEXBAR register.
#
# On Q35 machine types that QEMU intends to support in the long term, QEMU
- # never lets the RAM below 4 GB exceed 2 GB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x80000000
+ # never lets the RAM below 4 GB exceed 2816 MB.
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
!ifdef $(SOURCE_DEBUG_ENABLE)
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 733a4c9d8a..68073ef55b 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -497,8 +497,8 @@
# the PCIEXBAR register.
#
# On Q35 machine types that QEMU intends to support in the long term, QEMU
- # never lets the RAM below 4 GB exceed 2 GB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x80000000
+ # never lets the RAM below 4 GB exceed 2816 MB.
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
!ifdef $(SOURCE_DEBUG_ENABLE)
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2