ArmPkg ArmPlatformPkg ArmVirtPkg: ARM GICv2/v3 Base Address width fix-up

According to the ACPI 6.0/6.1 spec, the physical base address of GICC,
GICD, GICR and GIC ITS is 64-bit. So change the type of the various GIC
base address PCDs to 64-bit, and fix up all users.

Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Dennis Chen <dennis.chen@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

9 files changed, 27 insertions, 27 deletions

diff --git a/ArmPkg/Application/LinuxLoader/AArch64/LinuxStarter.c b/ArmPkg/Application/LinuxLoader/AArch64/LinuxStarter.c
index 0d540c920f..d82cf85111 100644
--- a/ArmPkg/Application/LinuxLoader/AArch64/LinuxStarter.c
+++ b/ArmPkg/Application/LinuxLoader/AArch64/LinuxStarter.c
@@ -97,7 +97,7 @@ StartLinux (
   LINUX_KERNEL64        LinuxKernel = (LINUX_KERNEL64)LinuxImage;

 

   // Send msg to secondary cores to go to the kernel pen.

-  ArmGicSendSgiTo (PcdGet32 (PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));

+  ArmGicSendSgiTo (PcdGet64 (PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));

 

   // Shut down UEFI boot services. ExitBootServices() will notify every driver that created an event on

   // ExitBootServices event. Example the Interrupt DXE driver will disable the interrupts on this event.

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index c189117c67..3cdb5da3d4 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -251,10 +251,10 @@
   #

   # ARM Generic Interrupt Controller

   #

-  gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C

+  gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT64|0x0000000C

   # Base address for the GIC Redistributor region that contains the boot CPU

-  gArmTokenSpaceGuid.PcdGicRedistributorsBase|0|UINT32|0x0000000E

-  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D

+  gArmTokenSpaceGuid.PcdGicRedistributorsBase|0|UINT64|0x0000000E

+  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT64|0x0000000D

   gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025

 

   #

diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
index 34d4be3867..b9ecd5543a 100644
--- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
+++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
@@ -259,8 +259,8 @@ GicV2DxeInitialize (
   // Make sure the Interrupt Controller Protocol is not already installed in the system.

   ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);

 

-  mGicInterruptInterfaceBase = PcdGet32 (PcdGicInterruptInterfaceBase);

-  mGicDistributorBase = PcdGet32 (PcdGicDistributorBase);

+  mGicInterruptInterfaceBase = PcdGet64 (PcdGicInterruptInterfaceBase);

+  mGicDistributorBase = PcdGet64 (PcdGicDistributorBase);

   mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);

 

   for (Index = 0; Index < mGicNumInterrupts; Index++) {

diff --git a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
index 983936f373..8af97a93b1 100644
--- a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
+++ b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
@@ -245,8 +245,8 @@ GicV3DxeInitialize (
   // Make sure the Interrupt Controller Protocol is not already installed in the system.

   ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);

 

-  mGicDistributorBase    = PcdGet32 (PcdGicDistributorBase);

-  mGicRedistributorsBase = PcdGet32 (PcdGicRedistributorsBase);

+  mGicDistributorBase    = PcdGet64 (PcdGicDistributorBase);

+  mGicRedistributorsBase = PcdGet64 (PcdGicRedistributorsBase);

   mGicNumInterrupts      = ArmGicGetMaxNumInterrupts (mGicDistributorBase);

 

   //

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
index 9023715ab0..754a36d562 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
@@ -73,7 +73,7 @@ ArmPlatformSecInitialize (
   MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);

 

   // Read the GIC Identification Register

-  Identification = ArmGicGetInterfaceIdentification (PcdGet32 (PcdGicInterruptInterfaceBase));

+  Identification = ArmGicGetInterfaceIdentification (PcdGet64 (PcdGicInterruptInterfaceBase));

 

   // Check if we are GICv3

   if (ARM_GIC_ICCIIDR_GET_ARCH_VERSION(Identification) >= 0x3) {

diff --git a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
index a452e38751..e617bdaa9c 100644
--- a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
+++ b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
@@ -40,11 +40,11 @@ NonSecureWaitForFirmware (
   ArmCallWFI ();

 

   // Acknowledge the interrupt and send End of Interrupt signal.

-  AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), &InterruptId);

+  AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet64 (PcdGicInterruptInterfaceBase), &InterruptId);

   // Check if it is a valid interrupt ID

-  if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {

+  if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet64 (PcdGicDistributorBase))) {

     // Got a valid SGI number hence signal End of Interrupt

-    ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);

+    ArmGicEndOfInterrupt (PcdGet64 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);

   }

 

   // Jump to secondary core entry point.

@@ -105,7 +105,7 @@ ArmPlatformSecExtraAction (
 

     if (ArmPlatformIsPrimaryCore (MpId)) {

       // Signal the secondary cores they can jump to PEI phase

-      ArmGicSendSgiTo (PcdGet32 (PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));

+      ArmGicSendSgiTo (PcdGet64 (PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));

 

       // To enter into Non Secure state, we need to make a return from exception

       *JumpAddress = PcdGet64 (PcdFvBaseAddress);

diff --git a/ArmPlatformPkg/PrePeiCore/MainMPCore.c b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
index fa544c79f9..dc47adbaff 100644
--- a/ArmPlatformPkg/PrePeiCore/MainMPCore.c
+++ b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
@@ -89,11 +89,11 @@ SecondaryMain (
     SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress);

 

     // Acknowledge the interrupt and send End of Interrupt signal.

-    AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), &InterruptId);

+    AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet64 (PcdGicInterruptInterfaceBase), &InterruptId);

     // Check if it is a valid interrupt ID

-    if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {

+    if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet64 (PcdGicDistributorBase))) {

       // Got a valid SGI number hence signal End of Interrupt

-      ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);

+      ArmGicEndOfInterrupt (PcdGet64 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);

     }

   } while (SecondaryEntryAddr == 0);

 

@@ -120,12 +120,12 @@ PrimaryMain (
   CreatePpiList (&PpiListSize, &PpiList);

 

   // Enable the GIC Distributor

-  ArmGicEnableDistributor (PcdGet32(PcdGicDistributorBase));

+  ArmGicEnableDistributor (PcdGet64(PcdGicDistributorBase));

 

   // If ArmVe has not been built as Standalone then we need to wake up the secondary cores

   if (FeaturePcdGet (PcdSendSgiToBringUpSecondaryCores)) {

     // Sending SGI to all the Secondary CPU interfaces

-    ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));

+    ArmGicSendSgiTo (PcdGet64(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));

   }

 

   // Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at

diff --git a/ArmPlatformPkg/PrePi/MainMPCore.c b/ArmPlatformPkg/PrePi/MainMPCore.c
index 603f4bb8be..27422d1f21 100644
--- a/ArmPlatformPkg/PrePi/MainMPCore.c
+++ b/ArmPlatformPkg/PrePi/MainMPCore.c
@@ -26,12 +26,12 @@ PrimaryMain (
   )

 {

   // Enable the GIC Distributor

-  ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));

+  ArmGicEnableDistributor(PcdGet64(PcdGicDistributorBase));

 

   // In some cases, the secondary cores are waiting for an SGI from the next stage boot loader to resume their initialization

   if (!FixedPcdGet32(PcdSendSgiToBringUpSecondaryCores)) {

     // Sending SGI to all the Secondary CPU interfaces

-    ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));

+    ArmGicSendSgiTo (PcdGet64(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));

   }

 

   PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp);

@@ -88,11 +88,11 @@ SecondaryMain (
     SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress);

 

     // Acknowledge the interrupt and send End of Interrupt signal.

-    AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), &InterruptId);

+    AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet64 (PcdGicInterruptInterfaceBase), &InterruptId);

     // Check if it is a valid interrupt ID

-    if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet32 (PcdGicDistributorBase))) {

+    if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet64 (PcdGicDistributorBase))) {

       // Got a valid SGI number hence signal End of Interrupt

-      ArmGicEndOfInterrupt (PcdGet32 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);

+      ArmGicEndOfInterrupt (PcdGet64 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);

     }

   } while (SecondaryEntryAddr == 0);

 

diff --git a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
index 7ef829ff2d..a1cd2da2d4 100644
--- a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
+++ b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
@@ -82,8 +82,8 @@ ArmVirtGicArchLibConstructor (
     RedistBase = SwapBytes64 (Reg[2]);

     ASSERT (RedistBase < MAX_UINT32);

 

-    PcdSet32 (PcdGicDistributorBase, (UINT32)DistBase);

-    PcdSet32 (PcdGicRedistributorsBase, (UINT32)RedistBase);

+    PcdSet64 (PcdGicDistributorBase, DistBase);

+    PcdSet64 (PcdGicRedistributorsBase, RedistBase);

 

     DEBUG ((EFI_D_INFO, "Found GIC v3 (re)distributor @ 0x%Lx (0x%Lx)\n",

       DistBase, RedistBase));

@@ -117,8 +117,8 @@ ArmVirtGicArchLibConstructor (
     ASSERT (DistBase < MAX_UINT32);

     ASSERT (CpuBase < MAX_UINT32);

 

-    PcdSet32 (PcdGicDistributorBase, (UINT32)DistBase);

-    PcdSet32 (PcdGicInterruptInterfaceBase, (UINT32)CpuBase);

+    PcdSet64 (PcdGicDistributorBase, DistBase);

+    PcdSet64 (PcdGicInterruptInterfaceBase, CpuBase);

 

     DEBUG ((EFI_D_INFO, "Found GIC @ 0x%Lx/0x%Lx\n", DistBase, CpuBase));