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| author | Sheng Wei <w.sheng@intel.com> | 2020-10-27 15:59:41 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2020-11-18 04:52:26 +0000 |
| commit | 1a110fcd4ef1e9286a7e02052d7e2b20b67dd3bc (patch) | |
| tree | ed9e049e5b9c841a78ec3d661e63a5acfeeccba3 | |
| parent | e6a12a0fc817e26ac05e8301e89433c2367ff362 (diff) | |
| download | edk2-1a110fcd4ef1e9286a7e02052d7e2b20b67dd3bc.tar.gz edk2-1a110fcd4ef1e9286a7e02052d7e2b20b67dd3bc.tar.bz2 edk2-1a110fcd4ef1e9286a7e02052d7e2b20b67dd3bc.zip | |
UefiCpuPkg/PiSmmCpuDxeSmm: Correct the Cr3 typo
Change the variable name from mInternalGr3 to mInternalCr3.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3015
Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c index ebfc46ad45..d67f036aea 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c @@ -32,7 +32,7 @@ PAGE_ATTRIBUTE_TABLE mPageAttributeTable[] = { {Page1G, SIZE_1GB, PAGING_1G_ADDRESS_MASK_64},
};
-UINTN mInternalGr3;
+UINTN mInternalCr3;
/**
Set the internal page table base address.
@@ -46,7 +46,7 @@ SetPageTableBase ( IN UINTN Cr3
)
{
- mInternalGr3 = Cr3;
+ mInternalCr3 = Cr3;
}
/**
@@ -59,8 +59,8 @@ GetPageTableBase ( VOID
)
{
- if (mInternalGr3 != 0) {
- return mInternalGr3;
+ if (mInternalCr3 != 0) {
+ return mInternalCr3;
}
return (AsmReadCr3 () & PAGING_4K_ADDRESS_MASK_64);
}
@@ -252,7 +252,7 @@ ConvertPageEntryAttribute ( if ((Attributes & EFI_MEMORY_RO) != 0) {
if (IsSet) {
NewPageEntry &= ~(UINT64)IA32_PG_RW;
- if (mInternalGr3 != 0) {
+ if (mInternalCr3 != 0) {
// Environment setup
// ReadOnly page need set Dirty bit for shadow stack
NewPageEntry |= IA32_PG_D;
|