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| author | Tom Lendacky <thomas.lendacky@amd.com> | 2020-11-06 11:53:09 -0600 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2020-11-10 19:07:55 +0000 |
| commit | fb2a1a36a292f0fb673aae344f5446134a1b0bf5 (patch) | |
| tree | 88a210ff7e6659e82cd9430cddd365e7b6efe631 | |
| parent | 12a0c11e81c42f780955082c6f916ac1c94b64fe (diff) | |
| download | edk2-fb2a1a36a292f0fb673aae344f5446134a1b0bf5.tar.gz edk2-fb2a1a36a292f0fb673aae344f5446134a1b0bf5.tar.bz2 edk2-fb2a1a36a292f0fb673aae344f5446134a1b0bf5.zip | |
UefiCpuPkg/MpInitLib: Set the SW exit fields when performing VMGEXIT
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008
All fields that are set in the GHCB should have their associated bit in
the GHCB ValidBitmap field set. Add support to set the bits for the
software exit information fields when performing a VMGEXIT (SwExitCode,
SwExitInfo1, SwExitInfo2).
Fixes: 20da7ca42a33d3ef767ce4129f11496af7f67c9f
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Message-Id: <6e11dd7e161bddeacc3fb4817467cef24510c31c.1604685192.git.thomas.lendacky@amd.com>
| -rw-r--r-- | UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm index 5d30f35b20..5532a1d391 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm @@ -533,6 +533,12 @@ BITS 64 mov rax, 0x80000004 ; VMGEXIT AP_RESET_HOLD
mov [rdx + 0x390], rax
+ mov rax, 114 ; Set SwExitCode valid bit
+ bts [rdx + 0x3f0], rax
+ inc rax ; Set SwExitInfo1 valid bit
+ bts [rdx + 0x3f0], rax
+ inc rax ; Set SwExitInfo2 valid bit
+ bts [rdx + 0x3f0], rax
pop rdx
pop rcx
|