ArmPkg: Apply uncrustify changes

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the ArmPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>

1 files changed, 87 insertions, 80 deletions

diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
index 54fad23cb4..2daf47ba6f 100644
--- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
@@ -22,7 +22,7 @@ SectionToGcdAttributes (
   *GcdAttributes = 0;

 

   // determine cacheability attributes

-  switch(SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) {

+  switch (SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) {

     case TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED:

       *GcdAttributes |= EFI_MEMORY_UC;

       break;

@@ -49,9 +49,9 @@ SectionToGcdAttributes (
   }

 

   // determine protection attributes

-  switch(SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {

+  switch (SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {

     case TT_DESCRIPTOR_SECTION_AP_NO_NO: // no read, no write

-      //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;

+      // *GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;

       break;

 

     case TT_DESCRIPTOR_SECTION_AP_RW_NO:

@@ -86,7 +86,7 @@ PageToGcdAttributes (
   *GcdAttributes = 0;

 

   // determine cacheability attributes

-  switch(PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {

+  switch (PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {

     case TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED:

       *GcdAttributes |= EFI_MEMORY_UC;

       break;

@@ -113,9 +113,9 @@ PageToGcdAttributes (
   }

 

   // determine protection attributes

-  switch(PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {

+  switch (PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {

     case TT_DESCRIPTOR_PAGE_AP_NO_NO: // no read, no write

-      //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;

+      // *GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;

       break;

 

     case TT_DESCRIPTOR_PAGE_AP_RW_NO:

@@ -143,43 +143,43 @@ PageToGcdAttributes (
 

 EFI_STATUS

 SyncCacheConfigPage (

-  IN     UINT32                             SectionIndex,

-  IN     UINT32                             FirstLevelDescriptor,

-  IN     UINTN                              NumberOfDescriptors,

-  IN     EFI_GCD_MEMORY_SPACE_DESCRIPTOR    *MemorySpaceMap,

-  IN OUT EFI_PHYSICAL_ADDRESS               *NextRegionBase,

-  IN OUT UINT64                             *NextRegionLength,

-  IN OUT UINT32                             *NextSectionAttributes

+  IN     UINT32                           SectionIndex,

+  IN     UINT32                           FirstLevelDescriptor,

+  IN     UINTN                            NumberOfDescriptors,

+  IN     EFI_GCD_MEMORY_SPACE_DESCRIPTOR  *MemorySpaceMap,

+  IN OUT EFI_PHYSICAL_ADDRESS             *NextRegionBase,

+  IN OUT UINT64                           *NextRegionLength,

+  IN OUT UINT32                           *NextSectionAttributes

   )

 {

-  EFI_STATUS                          Status;

-  UINT32                              i;

-  volatile ARM_PAGE_TABLE_ENTRY       *SecondLevelTable;

-  UINT32                              NextPageAttributes;

-  UINT32                              PageAttributes;

-  UINT32                              BaseAddress;

-  UINT64                              GcdAttributes;

+  EFI_STATUS                     Status;

+  UINT32                         i;

+  volatile ARM_PAGE_TABLE_ENTRY  *SecondLevelTable;

+  UINT32                         NextPageAttributes;

+  UINT32                         PageAttributes;

+  UINT32                         BaseAddress;

+  UINT64                         GcdAttributes;

 

   // Get the Base Address from FirstLevelDescriptor;

-  BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);

+  BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS (SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);

 

   // Convert SectionAttributes into PageAttributes

   NextPageAttributes =

-      TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(*NextSectionAttributes,0) |

-      TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(*NextSectionAttributes);

+    TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY (*NextSectionAttributes, 0) |

+    TT_DESCRIPTOR_CONVERT_TO_PAGE_AP (*NextSectionAttributes);

 

   // obtain page table base

   SecondLevelTable = (ARM_PAGE_TABLE_ENTRY *)(FirstLevelDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);

 

-  for (i=0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {

+  for (i = 0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {

     if ((SecondLevelTable[i] & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {

       // extract attributes (cacheability and permissions)

       PageAttributes = SecondLevelTable[i] & (TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK | TT_DESCRIPTOR_PAGE_AP_MASK);

 

       if (NextPageAttributes == 0) {

         // start on a new region

-        *NextRegionLength = 0;

-        *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);

+        *NextRegionLength  = 0;

+        *NextRegionBase    = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);

         NextPageAttributes = PageAttributes;

       } else if (PageAttributes != NextPageAttributes) {

         // Convert Section Attributes into GCD Attributes

@@ -190,8 +190,8 @@ SyncCacheConfigPage (
         SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);

 

         // start on a new region

-        *NextRegionLength = 0;

-        *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);

+        *NextRegionLength  = 0;

+        *NextRegionBase    = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);

         NextPageAttributes = PageAttributes;

       }

     } else if (NextPageAttributes != 0) {

@@ -202,37 +202,37 @@ SyncCacheConfigPage (
       // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)

       SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);

 

-      *NextRegionLength = 0;

-      *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);

+      *NextRegionLength  = 0;

+      *NextRegionBase    = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);

       NextPageAttributes = 0;

     }

+

     *NextRegionLength += TT_DESCRIPTOR_PAGE_SIZE;

   }

 

   // Convert back PageAttributes into SectionAttributes

   *NextSectionAttributes =

-      TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(NextPageAttributes,0) |

-      TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(NextPageAttributes);

+    TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (NextPageAttributes, 0) |

+    TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (NextPageAttributes);

 

   return EFI_SUCCESS;

 }

 

 EFI_STATUS

 SyncCacheConfig (

-  IN  EFI_CPU_ARCH_PROTOCOL *CpuProtocol

+  IN  EFI_CPU_ARCH_PROTOCOL  *CpuProtocol

   )

 {

-  EFI_STATUS                          Status;

-  UINT32                              i;

-  EFI_PHYSICAL_ADDRESS                NextRegionBase;

-  UINT64                              NextRegionLength;

-  UINT32                              NextSectionAttributes;

-  UINT32                              SectionAttributes;

-  UINT64                              GcdAttributes;

-  volatile ARM_FIRST_LEVEL_DESCRIPTOR   *FirstLevelTable;

-  UINTN                               NumberOfDescriptors;

-  EFI_GCD_MEMORY_SPACE_DESCRIPTOR     *MemorySpaceMap;

-

+  EFI_STATUS                           Status;

+  UINT32                               i;

+  EFI_PHYSICAL_ADDRESS                 NextRegionBase;

+  UINT64                               NextRegionLength;

+  UINT32                               NextSectionAttributes;

+  UINT32                               SectionAttributes;

+  UINT64                               GcdAttributes;

+  volatile ARM_FIRST_LEVEL_DESCRIPTOR  *FirstLevelTable;

+  UINTN                                NumberOfDescriptors;

+  EFI_GCD_MEMORY_SPACE_DESCRIPTOR      *MemorySpaceMap;

 

   DEBUG ((DEBUG_PAGE, "SyncCacheConfig()\n"));

 

@@ -243,10 +243,9 @@ SyncCacheConfig (
   // Get the memory space map from GCD

   //

   MemorySpaceMap = NULL;

-  Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);

+  Status         = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);

   ASSERT_EFI_ERROR (Status);

 

-

   // The GCD implementation maintains its own copy of the state of memory space attributes.  GCD needs

   // to know what the initial memory space attributes are.  The CPU Arch. Protocol does not provide a

   // GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were

@@ -261,15 +260,15 @@ SyncCacheConfig (
 

   // iterate through each 1MB descriptor

   NextRegionBase = NextRegionLength = 0;

-  for (i=0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {

+  for (i = 0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {

     if ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) {

       // extract attributes (cacheability and permissions)

       SectionAttributes = FirstLevelTable[i] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);

 

       if (NextSectionAttributes == 0) {

         // start on a new region

-        NextRegionLength = 0;

-        NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);

+        NextRegionLength      = 0;

+        NextRegionBase        = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);

         NextSectionAttributes = SectionAttributes;

       } else if (SectionAttributes != NextSectionAttributes) {

         // Convert Section Attributes into GCD Attributes

@@ -280,21 +279,27 @@ SyncCacheConfig (
         SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);

 

         // start on a new region

-        NextRegionLength = 0;

-        NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);

+        NextRegionLength      = 0;

+        NextRegionBase        = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);

         NextSectionAttributes = SectionAttributes;

       }

+

       NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;

-    } else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i])) {

+    } else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (FirstLevelTable[i])) {

       // In this case any bits set in the 'NextSectionAttributes' are garbage and were set from

       // bits that are actually part of the pagetable address.  We clear it out to zero so that

       // the SyncCacheConfigPage will use the page attributes instead of trying to convert the

       // section attributes into page attributes

       NextSectionAttributes = 0;

-      Status = SyncCacheConfigPage (

-          i,FirstLevelTable[i],

-          NumberOfDescriptors, MemorySpaceMap,

-          &NextRegionBase,&NextRegionLength,&NextSectionAttributes);

+      Status                = SyncCacheConfigPage (

+                                i,

+                                FirstLevelTable[i],

+                                NumberOfDescriptors,

+                                MemorySpaceMap,

+                                &NextRegionBase,

+                                &NextRegionLength,

+                                &NextSectionAttributes

+                                );

       ASSERT_EFI_ERROR (Status);

     } else {

       // We do not support yet 16MB sections

@@ -309,10 +314,11 @@ SyncCacheConfig (
         // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)

         SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);

 

-        NextRegionLength = 0;

-        NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);

+        NextRegionLength      = 0;

+        NextRegionBase        = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);

         NextSectionAttributes = 0;

       }

+

       NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;

     }

   } // section entry loop

@@ -333,10 +339,10 @@ SyncCacheConfig (
 

 UINT64

 EfiAttributeToArmAttribute (

-  IN UINT64                    EfiAttributes

+  IN UINT64  EfiAttributes

   )

 {

-  UINT64 ArmAttributes;

+  UINT64  ArmAttributes;

 

   switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {

     case EFI_MEMORY_UC:

@@ -382,15 +388,15 @@ EfiAttributeToArmAttribute (
 

 EFI_STATUS

 GetMemoryRegionPage (

-  IN     UINT32                  *PageTable,

-  IN OUT UINTN                   *BaseAddress,

-  OUT    UINTN                   *RegionLength,

-  OUT    UINTN                   *RegionAttributes

+  IN     UINT32  *PageTable,

+  IN OUT UINTN   *BaseAddress,

+  OUT    UINTN   *RegionLength,

+  OUT    UINTN   *RegionAttributes

   )

 {

-  UINT32      PageAttributes;

-  UINT32      TableIndex;

-  UINT32      PageDescriptor;

+  UINT32  PageAttributes;

+  UINT32  TableIndex;

+  UINT32  PageDescriptor;

 

   // Convert the section attributes into page attributes

   PageAttributes = ConvertSectionAttributesToPageAttributes (*RegionAttributes, 0);

@@ -400,7 +406,7 @@ GetMemoryRegionPage (
   ASSERT (TableIndex < TRANSLATION_TABLE_PAGE_COUNT);

 

   // Go through the page table to find the end of the section

-  for (; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {

+  for ( ; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {

     // Get the section at the given index

     PageDescriptor = PageTable[TableIndex];

 

@@ -416,7 +422,7 @@ GetMemoryRegionPage (
       }

     } else {

       // We do not support Large Page yet. We return EFI_SUCCESS that means end of the region.

-      ASSERT(0);

+      ASSERT (0);

       return EFI_SUCCESS;

     }

   }

@@ -426,9 +432,9 @@ GetMemoryRegionPage (
 

 EFI_STATUS

 GetMemoryRegion (

-  IN OUT UINTN                   *BaseAddress,

-  OUT    UINTN                   *RegionLength,

-  OUT    UINTN                   *RegionAttributes

+  IN OUT UINTN  *BaseAddress,

+  OUT    UINTN  *RegionLength,

+  OUT    UINTN  *RegionAttributes

   )

 {

   EFI_STATUS                  Status;

@@ -436,8 +442,8 @@ GetMemoryRegion (
   UINT32                      PageAttributes;

   UINT32                      PageTableIndex;

   UINT32                      SectionDescriptor;

-  ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;

-  UINT32                     *PageTable;

+  ARM_FIRST_LEVEL_DESCRIPTOR  *FirstLevelTable;

+  UINT32                      *PageTable;

 

   // Initialize the arguments

   *RegionLength = 0;

@@ -459,32 +465,32 @@ GetMemoryRegion (
   if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||

       ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))

   {

-    *BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;

+    *BaseAddress      = (*BaseAddress) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;

     *RegionAttributes = SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK;

   } else {

     // Otherwise, we round it to the page boundary

     *BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK;

 

     // Get the attribute at the page table level (Level 2)

-    PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);

+    PageTable = (UINT32 *)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);

 

     // Calculate index into first level translation table for start of modification

     PageTableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK)  >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;

     ASSERT (PageTableIndex < TRANSLATION_TABLE_PAGE_COUNT);

 

-    PageAttributes = PageTable[PageTableIndex] & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK;

+    PageAttributes    = PageTable[PageTableIndex] & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK;

     *RegionAttributes = TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (PageAttributes, 0) |

                         TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (PageAttributes);

   }

 

-  for (;TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {

+  for ( ; TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {

     // Get the section at the given index

     SectionDescriptor = FirstLevelTable[TableIndex];

 

     // If the entry is a level-2 page table then we scan it to find the end of the region

     if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (SectionDescriptor)) {

       // Extract the page table location from the descriptor

-      PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);

+      PageTable = (UINT32 *)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);

 

       // Scan the page table to find the end of the region.

       Status = GetMemoryRegionPage (PageTable, BaseAddress, RegionLength, RegionAttributes);

@@ -494,7 +500,8 @@ GetMemoryRegion (
         break;

       }

     } else if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||

-               ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION)) {

+               ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))

+    {

       if ((SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK) != *RegionAttributes) {

         // If the attributes of the section differ from the one targeted then we exit the loop

         break;