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| author | Sami Mujawar <sami.mujawar@arm.com> | 2018-10-09 16:35:22 +0100 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-10-12 17:40:33 +0200 |
| commit | 301402fa4797ac3a141e575329ca2ea91756414c (patch) | |
| tree | 0d5f58643cc72275887d3bb322813609906a9334 /ArmPkg/Include/Library/ArmGicLib.h | |
| parent | bbce001515bbfcad24c216b1c9c25057e8c461e9 (diff) | |
| download | edk2-301402fa4797ac3a141e575329ca2ea91756414c.tar.gz edk2-301402fa4797ac3a141e575329ca2ea91756414c.tar.bz2 edk2-301402fa4797ac3a141e575329ca2ea91756414c.zip | |
ArmPkg: Add support for GICv4
Updated Redistributor base calculation to allow for the fact that
GICv4 has 2 additional 64KB frames (for VLPI and a reserved frame).
The code now tests the VLPIS bit in the GIC Redistributor Type
Register (GICR_TYPER) and calculates the Redistributor granularity
accordingly.
The code changes are:
GICR_TYPER register fields, etc, added to the header.
Loop updated to pay attention to GICR_TYPER.Last.
Derive frame "stride" size from GICR_TYPER.VLPIS.
Note: The assumption is that the redistributors are adjacent for
all CPUs. However this may not be the case for NUMA systems.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Diffstat (limited to 'ArmPkg/Include/Library/ArmGicLib.h')
| -rw-r--r-- | ArmPkg/Include/Library/ArmGicLib.h | 22 |
1 files changed, 19 insertions, 3 deletions
diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h index 4b21ea9e4e..5775905ca9 100644 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ b/ArmPkg/Include/Library/ArmGicLib.h @@ -1,6 +1,6 @@ /** @file
*
-* Copyright (c) 2011-2017, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2018, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@@ -60,12 +60,28 @@ // GIC Redistributor
-#define ARM_GICR_CTLR_FRAME_SIZE SIZE_64KB
-#define ARM_GICR_SGI_PPI_FRAME_SIZE SIZE_64KB
+#define ARM_GICR_CTLR_FRAME_SIZE SIZE_64KB
+#define ARM_GICR_SGI_PPI_FRAME_SIZE SIZE_64KB
+#define ARM_GICR_SGI_VLPI_FRAME_SIZE SIZE_64KB
+#define ARM_GICR_SGI_RESERVED_FRAME_SIZE SIZE_64KB
// GIC Redistributor Control frame
#define ARM_GICR_TYPER 0x0008 // Redistributor Type Register
+// GIC Redistributor TYPER bit assignments
+#define ARM_GICR_TYPER_PLPIS (1 << 0) // Physical LPIs
+#define ARM_GICR_TYPER_VLPIS (1 << 1) // Virtual LPIs
+#define ARM_GICR_TYPER_DIRECTLPI (1 << 3) // Direct LPIs
+#define ARM_GICR_TYPER_LAST (1 << 4) // Last Redistributor in series
+#define ARM_GICR_TYPER_DPGS (1 << 5) // Disable Processor Group
+ // Selection Support
+#define ARM_GICR_TYPER_PROCNO (0xFFFF << 8) // Processor Number
+#define ARM_GICR_TYPER_COMMONLPIAFF (0x3 << 24) // Common LPI Affinity
+#define ARM_GICR_TYPER_AFFINITY (0xFFFFFFFFULL << 32) // Redistributor Affinity
+
+#define ARM_GICR_TYPER_GET_AFFINITY(TypeReg) (((TypeReg) & \
+ ARM_GICR_TYPER_AFFINITY) >> 32)
+
// GIC SGI & PPI Redistributor frame
#define ARM_GICR_ISENABLER 0x0100 // Interrupt Set-Enable Registers
#define ARM_GICR_ICENABLER 0x0180 // Interrupt Clear-Enable Registers
|