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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2015-11-24 07:48:06 +0000
committerabiesheuvel <abiesheuvel@Edk2>2015-11-24 07:48:06 +0000
commit2cde2696f5cd252c48fe250d44590869dae7a1e9 (patch)
treeac2739971baf4f85b58aee41139fbe222179dc2d /ArmPkg/Library/ArmLib/ArmV7
parent1dc3f34f61044a19573b1ecc507081bfcb075739 (diff)
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ArmLib/ArmV7Mmu: use 64-bit type for mapping region size
The way the v7 MMU code is invoked by the Xen port is somewhat of a pathological case, since it describes its physical memory space using a single cacheable region that covers the entire addressable range. When clipping this region to the part that is 1:1 addressable, we end up with a region of exactly 4 GB in size, which just exceeds the range of the UINT32 variable we use in FillTranslationTable() to track our progress while populating the page tables. So promote it to UINT64 instead. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18930 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Library/ArmLib/ArmV7')
-rw-r--r--ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
index 2e39ce00fe..23d2e43beb 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
@@ -148,7 +148,7 @@ FillTranslationTable (
UINT32 *SectionEntry;
UINT32 Attributes;
UINT32 PhysicalBase;
- UINT32 RemainLength;
+ UINT64 RemainLength;
ASSERT(MemoryRegion->Length > 0);