diff options
| author | Ronald Cron <ronald.cron@arm.com> | 2014-08-19 13:29:52 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-08-19 13:29:52 +0000 |
| commit | 3402aac7d985bf8a9f9d3c639f3fe93609380513 (patch) | |
| tree | 67b11334dc45181581aaaac236243fe72c7f614c /ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm | |
| parent | 62d441fb17d59958bf00c4a1f3b52bf6a0b40b24 (diff) | |
| download | edk2-3402aac7d985bf8a9f9d3c639f3fe93609380513.tar.gz edk2-3402aac7d985bf8a9f9d3c639f3fe93609380513.tar.bz2 edk2-3402aac7d985bf8a9f9d3c639f3fe93609380513.zip | |
ARM Packages: Removed trailing spaces
Trailing spaces create issue/warning when generating/applying patches.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15833 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm')
| -rwxr-xr-x | ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm b/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm index 3cc753ccc6..a9f29e2306 100755 --- a/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm +++ b/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm @@ -1,4 +1,4 @@ -;------------------------------------------------------------------------------
+;------------------------------------------------------------------------------
;
; SetMem() worker for ARM
;
@@ -33,9 +33,9 @@ InternalMemSetMem ( IN UINT8 Value
)
**/
-
+
EXPORT InternalMemSetMem
-
+
AREA AsmMemStuff, CODE, READONLY
InternalMemSetMem
@@ -55,14 +55,14 @@ L32 L31
and r4, r2, #0xff
orr r4, r4, r4, LSL #8
- orr r4, r4, r4, LSL #16
+ orr r4, r4, r4, LSL #16
mov r5, r4
mov r6, r4
- mov r7, r4
- mov r8, r4
- mov r9, r4
- mov r10, r4
- mov r11, r4
+ mov r7, r4
+ mov r8, r4
+ mov r9, r4
+ mov r10, r4
+ mov r11, r4
b L32
L34
cmp lr, #0
@@ -77,5 +77,5 @@ L43 cmp r1, #0
bne L34
ldmfd sp!, {r4-r11, pc}
-
+
END
|