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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-12-15 15:01:42 +0000 |
|---|---|---|
| committer | abiesheuvel <abiesheuvel@Edk2> | 2015-12-15 15:01:42 +0000 |
| commit | 1a0db79125bad94aaaa97e1146100594a1471382 (patch) | |
| tree | 40a7a97a140fee5d734c8b13593f3f45a03c6204 /ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S | |
| parent | 660aaec3118b0763ee4fcd83b936bf15ffcf23a9 (diff) | |
| download | edk2-1a0db79125bad94aaaa97e1146100594a1471382.tar.gz edk2-1a0db79125bad94aaaa97e1146100594a1471382.tar.bz2 edk2-1a0db79125bad94aaaa97e1146100594a1471382.zip | |
ArmPkg: use unified asm syntax for CLANG
The CLANG assembler does not support the legacy, non-unified assembler syntax,
i.e., it does not support the reordering of the condition suffixes with the
increment/decrement before/after or byte/word suffixes, and it does not
recognize the 'empty descending' (ED) suffix at all. So move to the unified
syntax, and replace 'empty descending' with 'decrement after' or 'increment
before' as appropriate.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19280 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S')
| -rw-r--r-- | ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S index 7f41353e01..09c9004ddf 100644 --- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S +++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S @@ -14,6 +14,7 @@ #
.text
+.syntax unified
.p2align 2
GCC_ASM_EXPORT(__switch16)
@@ -22,9 +23,9 @@ ASM_PFX(__switch16): ldrh ip, [lr, #-1]
cmp r0, ip
add r0, lr, r0, lsl #1
- ldrccsh r0, [r0, #1]
+ ldrshcc r0, [r0, #1]
add ip, lr, ip, lsl #1
- ldrcssh r0, [ip, #1]
+ ldrshcs r0, [ip, #1]
add ip, lr, r0, lsl #1
bx ip
|