diff options
| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-11-09 13:28:17 +0000 |
|---|---|---|
| committer | abiesheuvel <abiesheuvel@Edk2> | 2015-11-09 13:28:17 +0000 |
| commit | c653fc2a91a946ea249e5d6161bca84f6c824f09 (patch) | |
| tree | d7f4d81b5b674fdc1bdf02ec67a38ab8a08d5462 /ArmPkg | |
| parent | 8c5ac451d570f0a5680dd7614eb19404feb717d9 (diff) | |
| download | edk2-c653fc2a91a946ea249e5d6161bca84f6c824f09.tar.gz edk2-c653fc2a91a946ea249e5d6161bca84f6c824f09.tar.bz2 edk2-c653fc2a91a946ea249e5d6161bca84f6c824f09.zip | |
ArmPkg/ArmLib: add accessor function for Cache Writeback Granule
Add a function to ArmLib that provides access to the Cache Writeback
Granule (CWG) field in CTR_EL0. This information is required when
performing non-coherent DMA.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18758 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg')
| -rw-r--r-- | ArmPkg/Include/Library/ArmLib.h | 6 | ||||
| -rw-r--r-- | ArmPkg/Library/ArmLib/Common/ArmLib.c | 17 |
2 files changed, 23 insertions, 0 deletions
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index 2059a67bbf..a328146b69 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -116,6 +116,12 @@ ArmInstructionCacheLineLength ( UINTN
EFIAPI
+ArmCacheWritebackGranule (
+ VOID
+ );
+
+UINTN
+EFIAPI
ArmIsArchTimerImplemented (
VOID
);
diff --git a/ArmPkg/Library/ArmLib/Common/ArmLib.c b/ArmPkg/Library/ArmLib/Common/ArmLib.c index ad0a265e9f..7e227936fa 100644 --- a/ArmPkg/Library/ArmLib/Common/ArmLib.c +++ b/ArmPkg/Library/ArmLib/Common/ArmLib.c @@ -88,3 +88,20 @@ ArmInstructionCacheLineLength ( {
return 4 << (ArmCacheInfo () & 0xf); // CTR_EL0.IminLine
}
+
+UINTN
+EFIAPI
+ArmCacheWritebackGranule (
+ VOID
+ )
+{
+ UINTN CWG;
+
+ CWG = (ArmCacheInfo () >> 24) & 0xf; // CTR_EL0.CWG
+
+ if (CWG == 0) {
+ return SIZE_2KB;
+ }
+
+ return 4 << CWG;
+}
|