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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-05-07 15:40:31 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@Edk2> | 2015-05-07 15:40:31 +0000 |
| commit | 0ee59fd7d036479e1c6ce6f5012861cdf43c30ea (patch) | |
| tree | bb1311d5d49168b70fed5cf3d0b50a7f3c395586 /ArmPlatformPkg/ArmVExpressPkg | |
| parent | 35eabda773e7e6b53d4cd2072e25b79136eeba7d (diff) | |
| download | edk2-0ee59fd7d036479e1c6ce6f5012861cdf43c30ea.tar.gz edk2-0ee59fd7d036479e1c6ce6f5012861cdf43c30ea.tar.bz2 edk2-0ee59fd7d036479e1c6ce6f5012861cdf43c30ea.zip | |
ArmVExpressPkg: add support for embedding DTBs for AArch64 variants
If DTB_DIR=<path> is set during the build, incorporate DTBs from
that path for all AArch64 FVP platform variants so that they can
be loaded straight from the firmware image instead of from a file
system. This relieves a user of having to keep a DTB file with the
right name in the working directory of the model.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17360 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/ArmVExpressPkg')
| -rw-r--r-- | ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf index e7e6dc1446..19157283a6 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf +++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf @@ -212,6 +212,31 @@ READ_LOCK_STATUS = TRUE # after the device drivers (eg: Ethernet) to ensure we have support for them.
INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf
+!ifdef $(DTB_DIR)
+ #
+ # Embed flattened device tree (FDT) images for all known
+ # variants of this platform
+ #
+ FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2) {
+ $(DTB_DIR)/fvp-base-gicv2-psci.dtb
+ }
+ FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2Legacy) {
+ $(DTB_DIR)/fvp-base-gicv2legacy-psci.dtb
+ }
+ FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV3) {
+ $(DTB_DIR)/fvp-base-gicv3-psci.dtb
+ }
+ FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2) {
+ $(DTB_DIR)/fvp-foundation-gicv2-psci.dtb
+ }
+ FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2Legacy) {
+ $(DTB_DIR)/fvp-foundation-gicv2legacy-psci.dtb
+ }
+ FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV3) {
+ $(DTB_DIR)/fvp-foundation-gicv3-psci.dtb
+ }
+!endif
+
[FV.FVMAIN_COMPACT]
FvAlignment = 16
ERASE_POLARITY = 1
|