ArmPkg/ArmPkg.dec: Redefined PcdSystemMemory(Base|Size) as UINT64

The System Memory region might be out of the 32-bit memory space.

This change has been validated on the FVP AArch64 model using 4GB
of DRAM at 0x8_0000_0000:

-  # System Memory (2GB)
-  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
-  gArmTokenSpaceGuid.PcdSystemMemorySize|0x80000000
+  # System Memory (4GB)
+  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x800000000
+  gArmTokenSpaceGuid.PcdSystemMemorySize|0x100000000

EFI Shell and Linux kernel boot successfully.

Note: This change has not been validated on AArch32. I expect some
early assembly code to not work.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>




git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15093 6f19259b-4bc3-4df7-8a09-765794883524

3 files changed, 12 insertions, 12 deletions

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4/ArmPlatform.h b/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4/ArmPlatform.h
index 06537a428b..b692b168cb 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4/ArmPlatform.h
+++ b/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4/ArmPlatform.h
@@ -52,8 +52,8 @@
 #define ARM_VE_SMB_PERIPH_SZ                    SIZE_64MB

 

 // DRAM

-#define ARM_VE_DRAM_BASE                        PcdGet32 (PcdSystemMemoryBase)

-#define ARM_VE_DRAM_SZ                          PcdGet32 (PcdSystemMemorySize)

+#define ARM_VE_DRAM_BASE                        PcdGet64 (PcdSystemMemoryBase)

+#define ARM_VE_DRAM_SZ                          PcdGet64 (PcdSystemMemorySize)

 // Inside the DRAM we allocate a section for the VRAM (Video RAM)

 #define LCD_VRAM_CORE_TILE_BASE                     0x64000000

 

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM/ArmPlatform.h b/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM/ArmPlatform.h
index b568d6fa2e..06414e6e72 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM/ArmPlatform.h
+++ b/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM/ArmPlatform.h
@@ -45,8 +45,8 @@
 #define ARM_VE_SMB_PERIPH_SZ                    SIZE_64MB

 

 // DRAM

-#define ARM_VE_DRAM_BASE                        PcdGet32 (PcdSystemMemoryBase)

-#define ARM_VE_DRAM_SZ                          PcdGet32 (PcdSystemMemorySize)

+#define ARM_VE_DRAM_BASE                        PcdGet64 (PcdSystemMemoryBase)

+#define ARM_VE_DRAM_SZ                          PcdGet64 (PcdSystemMemorySize)

 

 // This can be any value since we only support motherboard PL111

 #define LCD_VRAM_CORE_TILE_BASE                 0x00000000

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c
index 473b3f323e..e633c89375 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Mem.c
@@ -136,18 +136,18 @@ ArmPlatformGetVirtualMemoryMap (
 

 #ifndef ARM_BIGLITTLE_TC2

   // Workaround for SRAM bug in RTSM

-  if (PcdGet32 (PcdSystemMemoryBase) != 0x80000000) {

+  if (PcdGet64 (PcdSystemMemoryBase) != 0x80000000) {

     VirtualMemoryTable[++Index].PhysicalBase  = 0x80000000;

     VirtualMemoryTable[Index].VirtualBase     = 0x80000000;

-    VirtualMemoryTable[Index].Length          = PcdGet32 (PcdSystemMemoryBase) - 0x80000000;

+    VirtualMemoryTable[Index].Length          = PcdGet64 (PcdSystemMemoryBase) - 0x80000000;

     VirtualMemoryTable[Index].Attributes      = CacheAttributes;

   }

 #endif

 

   // DDR

-  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet32 (PcdSystemMemoryBase);

-  VirtualMemoryTable[Index].VirtualBase     = PcdGet32 (PcdSystemMemoryBase);

-  VirtualMemoryTable[Index].Length          = PcdGet32 (PcdSystemMemorySize);

+  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdSystemMemoryBase);

+  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdSystemMemoryBase);

+  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdSystemMemorySize);

   VirtualMemoryTable[Index].Attributes      = CacheAttributes;

 

   // Detect if it is a 1GB or 2GB Test Chip

@@ -159,13 +159,13 @@ ArmPlatformGetVirtualMemoryMap (
         EFI_RESOURCE_ATTRIBUTE_PRESENT | EFI_RESOURCE_ATTRIBUTE_INITIALIZED | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |

           EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |

           EFI_RESOURCE_ATTRIBUTE_TESTED,

-        PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize),

+        PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize),

         SIZE_1GB

     );

 

     // Map the additional 1GB into the MMU

-    VirtualMemoryTable[++Index].PhysicalBase  = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize);

-    VirtualMemoryTable[Index].VirtualBase     = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize);

+    VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize);

+    VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize);

     VirtualMemoryTable[Index].Length          = SIZE_1GB;

     VirtualMemoryTable[Index].Attributes      = CacheAttributes;

   }