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| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-05-02 20:04:42 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-05-02 20:04:42 +0000 |
| commit | 40ab42ddca705bc0fedce6a933ef3b4787863445 (patch) | |
| tree | 204d22ac95ede45e92b5924e18193235c21a6d27 /ArmPlatformPkg/Drivers/PL011Uart | |
| parent | c54de82204db5ae68b2ad2840c8388c2fd725727 (diff) | |
| download | edk2-40ab42ddca705bc0fedce6a933ef3b4787863445.tar.gz edk2-40ab42ddca705bc0fedce6a933ef3b4787863445.tar.bz2 edk2-40ab42ddca705bc0fedce6a933ef3b4787863445.zip | |
EmbeddedPkg/SerialDxe: Do not block UART when no data is available on the port
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13255 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/Drivers/PL011Uart')
| -rw-r--r-- | ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c | 31 |
1 files changed, 15 insertions, 16 deletions
diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c index ca487ec98c..d728121b29 100644 --- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c +++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c @@ -3,7 +3,7 @@ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -34,7 +34,6 @@ PL011UartInitializePort ( IN UINTN UartBase,
IN UINT64 BaudRate,
IN UINT32 ReceiveFifoDepth,
- IN UINT32 Timeout,
IN EFI_PARITY_TYPE Parity,
IN UINT8 DataBits,
IN EFI_STOP_BITS_TYPE StopBits
@@ -47,7 +46,7 @@ PL011UartInitializePort ( if (BaudRate == 0) {
return RETURN_INVALID_PARAMETER;
}
-
+
LineControl = 0;
// The PL011 supports a buffer of either 1 or 32 chars. Therefore we can accept
@@ -122,7 +121,7 @@ PL011UartInitializePort ( default:
return RETURN_INVALID_PARAMETER;
}
-
+
// Don't send the LineControl value to the PL011 yet,
// wait until after the Baud Rate setting.
// This ensures we do not mess up the UART settings halfway through
@@ -134,7 +133,7 @@ PL011UartInitializePort ( if (PcdGet32(PL011UartInteger) != 0) {
// Integer and Factional part must be different of 0
ASSERT(PcdGet32(PL011UartFractional) != 0);
-
+
MmioWrite32 (UartBase + UARTIBRD, PcdGet32(PL011UartInteger));
MmioWrite32 (UartBase + UARTFBRD, PcdGet32(PL011UartFractional));
} else {
@@ -305,14 +304,14 @@ PL011UartWrite ( IN UINTN NumberOfBytes
)
{
- UINTN Count;
+ UINTN Count;
- for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
- while ((MmioRead32 (UartBase + UARTFR) & UART_TX_EMPTY_FLAG_MASK) == 0);
- MmioWrite8 (UartBase + UARTDR, *Buffer);
- }
+ for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
+ while ((MmioRead32 (UartBase + UARTFR) & UART_TX_EMPTY_FLAG_MASK) == 0);
+ MmioWrite8 (UartBase + UARTDR, *Buffer);
+ }
- return NumberOfBytes;
+ return NumberOfBytes;
}
/**
@@ -335,12 +334,12 @@ PL011UartRead ( {
UINTN Count;
- for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
- while ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) != 0);
- *Buffer = MmioRead8 (UartBase + UARTDR);
- }
+ for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
+ while ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) != 0);
+ *Buffer = MmioRead8 (UartBase + UARTDR);
+ }
- return NumberOfBytes;
+ return NumberOfBytes;
}
/**
|