Arm Packages: Fixed coding style/Line endings to follow EDK2 coding convention

Arm Packages: Fixed mispelling

Arm Packages: Reduced warnings all over the code




git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12407 6f19259b-4bc3-4df7-8a09-765794883524

2 files changed, 70 insertions, 72 deletions

diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.S b/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.S
index f8c5f65763..49174cc942 100644
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.S
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.S
@@ -1,69 +1,69 @@
-//
-//  Copyright (c) 2011, ARM Limited. All rights reserved.
-//  
-//  This program and the accompanying materials                          
-//  are licensed and made available under the terms and conditions of the BSD License         
-//  which accompanies this distribution.  The full text of the license may be found at        
-//  http://opensource.org/licenses/bsd-license.php                                            
-//
-//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-//
-//
-
-#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-
-.text
-.align 3
-
-#global symbols referenced by this module
-GCC_ASM_IMPORT(CEntryPoint)
-
-StartupAddr: .word    CEntryPoint
-
-#make _ModuleEntryPoint as global
-GCC_ASM_EXPORT(_ModuleEntryPoint)
-
-
-ASM_PFX(_ModuleEntryPoint):
-  # Identify CPU ID
-  mrc   p15, 0, r0, c0, c0, 5
-  and   r0, #0xf
-
-_SetupStack:
-  # Setup Stack for the 4 CPU cores
-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase), r1)
-  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)
-  
-  mov     r3,r0         @ r3 = core_id
-  mul     r3,r3,r2      @ r3 = core_id * stack_size = offset from the stack base
-  add     r3,r3,r1      @ r3 = stack_base + offset
-  add     r3,r3,r2,LSR #1   @ r3 = stack_offset + (stack_size/2)   <-- the top half is for the heap
-  mov     sp, r3
-
-  # Only allocate memory in top of the primary core stack
-  cmp   r0, #0
-  bne   _PrepareArguments
-
-_AllocateGlobalPeiVariables:
-  # Reserve top of the stack for Global PEI Variables (eg: PeiServicesTablePointer)
-  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r1)
-  sub   sp, sp, r1
-
-_PrepareArguments:
-  # The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
-  LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)
-  add   r2, r2, #4
-  ldr   r1, [r2]
-
-  # move sec startup address into a data register
-  # ensure we're jumping to FV version of the code (not boot remapped alias)
-  ldr   r2, StartupAddr
-
-  # jump to PrePeiCore C code
-  #    r0 = core_id
-  #    r1 = pei_core_address
-  blx   r2
+//

+//  Copyright (c) 2011, ARM Limited. All rights reserved.

+//  

+//  This program and the accompanying materials                          

+//  are licensed and made available under the terms and conditions of the BSD License         

+//  which accompanies this distribution.  The full text of the license may be found at        

+//  http://opensource.org/licenses/bsd-license.php                                            

+//

+//  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     

+//  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             

+//

+//

+

+#include <AsmMacroIoLib.h>

+#include <Base.h>

+#include <Library/PcdLib.h>

+#include <AutoGen.h>

+

+.text

+.align 3

+

+#global symbols referenced by this module

+GCC_ASM_IMPORT(CEntryPoint)

+

+StartupAddr: .word    CEntryPoint

+

+#make _ModuleEntryPoint as global

+GCC_ASM_EXPORT(_ModuleEntryPoint)

+

+

+ASM_PFX(_ModuleEntryPoint):

+  # Identify CPU ID

+  mrc   p15, 0, r0, c0, c0, 5

+  and   r0, #0xf

+

+_SetupStack:

+  # Setup Stack for the 4 CPU cores

+  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase), r1)

+  LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)

+  

+  mov     r3,r0         @ r3 = core_id

+  mul     r3,r3,r2      @ r3 = core_id * stack_size = offset from the stack base

+  add     r3,r3,r1      @ r3 = stack_base + offset

+  add     r3,r3,r2,LSR #1   @ r3 = stack_offset + (stack_size/2)   <-- the top half is for the heap

+  mov     sp, r3

+

+  # Only allocate memory in top of the primary core stack

+  cmp   r0, #0

+  bne   _PrepareArguments

+

+_AllocateGlobalPeiVariables:

+  # Reserve top of the stack for Global PEI Variables (eg: PeiServicesTablePointer)

+  LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r1)

+  sub   sp, sp, r1

+

+_PrepareArguments:

+  # The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector

+  LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)

+  add   r2, r2, #4

+  ldr   r1, [r2]

+

+  # move sec startup address into a data register

+  # ensure we're jumping to FV version of the code (not boot remapped alias)

+  ldr   r2, StartupAddr

+

+  # jump to PrePeiCore C code

+  #    r0 = core_id

+  #    r1 = pei_core_address

+  blx   r2

diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf b/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
index f37bcb0751..be846c581c 100644
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
@@ -44,6 +44,7 @@
   DebugAgentLib

   IoLib

   PrintLib

+  SerialPortLib

 

 [Ppis]

   gEfiTemporaryRamSupportPpiGuid

@@ -62,6 +63,3 @@
   

   gArmTokenSpaceGuid.PcdGicDistributorBase

   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase

-

-  gArmTokenSpaceGuid.PcdNormalFvBaseAddress

-  gArmTokenSpaceGuid.PcdNormalFvSize