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authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2012-07-04 20:08:54 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2012-07-04 20:08:54 +0000
commita75568e9c96cc17b1e802bb43f97c26af0e6f77b (patch)
tree310c66aa9e5527b78012d70cfaf81ee176eb8e7e /ArmPlatformPkg/Sec/Helper.asm
parent77734e3d69e98160d441ee2e56cca07390d2bc59 (diff)
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ArmPlatformPkg/Sec: Added support for Non Cold Boot Paths
For instance, in case of CpuHotPlug boot path the platform has already been initialized. The CPU core should not execute any of the platform initialization in this case. Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13492 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/Sec/Helper.asm')
-rw-r--r--ArmPlatformPkg/Sec/Helper.asm20
1 files changed, 12 insertions, 8 deletions
diff --git a/ArmPlatformPkg/Sec/Helper.asm b/ArmPlatformPkg/Sec/Helper.asm
index a03a90626e..b31cc31a97 100644
--- a/ArmPlatformPkg/Sec/Helper.asm
+++ b/ArmPlatformPkg/Sec/Helper.asm
@@ -20,17 +20,18 @@
// r0: Monitor World EntryPoint
// r1: MpId
-// r2: Secure Monitor mode stack
-enter_monitor_mode
- cmp r2, #0 // If a Secure Monitor stack base has not been defined then use the Secure stack
- moveq r2, sp
+// r2: SecBootMode
+// r3: Secure Monitor mode stack
+enter_monitor_mode FUNCTION
+ cmp r3, #0 // If a Secure Monitor stack base has not been defined then use the Secure stack
+ moveq r3, sp
mrs r4, cpsr // Save current mode (SVC) in r4
- bic r3, r4, #0x1f // Clear all mode bits
- orr r3, r3, #0x16 // Set bits for Monitor mode
- msr cpsr_cxsf, r3 // We are now in Monitor Mode
+ bic r5, r4, #0x1f // Clear all mode bits
+ orr r5, r5, #0x16 // Set bits for Monitor mode
+ msr cpsr_cxsf, r5 // We are now in Monitor Mode
- mov sp, r2 // Set the stack of the Monitor Mode
+ mov sp, r3 // Set the stack of the Monitor Mode
mov lr, r0 // Use the pass entrypoint as lr
@@ -38,8 +39,11 @@ enter_monitor_mode
mov r4, r0 // Swap EntryPoint and MpId registers
mov r0, r1
+ mov r1, r2
+ mov r2, r3
bx r4
+ ENDFUNC
// We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.
// When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into