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| author | Mark Rutland <mark.rutland@arm.com> | 2015-11-19 14:39:48 +0000 |
|---|---|---|
| committer | abiesheuvel <abiesheuvel@Edk2> | 2015-11-19 14:39:48 +0000 |
| commit | d855b261d19e2c21c059293befe6ab37db1e8efb (patch) | |
| tree | e4d5519323fcd779516500d5f317cec21e074096 /ArmPlatformPkg | |
| parent | fafb7e9c110eb89d1d1da18a822cae49758b76f6 (diff) | |
| download | edk2-d855b261d19e2c21c059293befe6ab37db1e8efb.tar.gz edk2-d855b261d19e2c21c059293befe6ab37db1e8efb.tar.bz2 edk2-d855b261d19e2c21c059293befe6ab37db1e8efb.zip | |
ArmPkg/ArmPlatformPkg: position vectors relative to base
We currently rely on .align directives to ensure that each exception
vector entry is the appropriate offset from the vector base address.
This is slightly fragile, as were an entry to become too large (greater
than 32 A64 instructions), all following entries would be silently
shifted until they meet the next alignment boundary. Thus we might
execute the wrong code in response to an exception.
To prevent this, introduce a new macro, VECTOR_ENTRY, that uses .org
directives to position each entry at the precise required offset from
the base of a vector. A vector entry which is too large will trigger a
build failure rather than a runtime failure which is difficult to debug.
For consistency, the base and end of each vector is similarly annotated,
with VECTOR_BASE and VECTOR_END, which provide the necessary alignment
and symbol exports. The now redundant directives and labels are removed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18904 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg')
| -rw-r--r-- | ArmPlatformPkg/PrePeiCore/AArch64/Exception.S | 27 |
1 files changed, 13 insertions, 14 deletions
diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S b/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S index cdc8d925bc..b31854ced2 100644 --- a/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S +++ b/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S @@ -11,22 +11,17 @@ #
#
+#include <Chipset/AArch64.h>
#include <AsmMacroIoLibV8.h>
#include <Base.h>
#include <AutoGen.h>
.text
-.align 11
-
-GCC_ASM_EXPORT(PeiVectorTable)
//============================================================
//Default Exception Handlers
//============================================================
-ASM_PFX(PeiVectorTable):
-
-
#define TO_HANDLER \
EL1_OR_EL2(x1) \
1: mrs x1, elr_el1 /* EL1 Exception Link Register */ ;\
@@ -40,42 +35,46 @@ ASM_PFX(PeiVectorTable): // No context saving at all.
//
-.align 7
+VECTOR_BASE(PeiVectorTable)
+
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_SYNC)
_DefaultSyncExceptHandler_t:
mov x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
TO_HANDLER
-.align 7
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_IRQ)
_DefaultIrq_t:
mov x0, #EXCEPT_AARCH64_IRQ
TO_HANDLER
-.align 7
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_FIQ)
_DefaultFiq_t:
mov x0, #EXCEPT_AARCH64_FIQ
TO_HANDLER
-.align 7
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_SERR)
_DefaultSError_t:
mov x0, #EXCEPT_AARCH64_SERROR
TO_HANDLER
-.align 7
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_SYNC)
_DefaultSyncExceptHandler_h:
mov x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
TO_HANDLER
-.align 7
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_IRQ)
_DefaultIrq_h:
mov x0, #EXCEPT_AARCH64_IRQ
TO_HANDLER
-.align 7
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_FIQ)
_DefaultFiq_h:
mov x0, #EXCEPT_AARCH64_FIQ
TO_HANDLER
-.align 7
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_SERR)
_DefaultSError_h:
mov x0, #EXCEPT_AARCH64_SERROR
TO_HANDLER
+
+VECTOR_END(PeiVectorTable)
|