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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-07-28 20:45:36 +0000 |
|---|---|---|
| committer | abiesheuvel <abiesheuvel@Edk2> | 2015-07-28 20:45:36 +0000 |
| commit | 15c9b25e5d363a8f39e9df06cf60f5a45316ae2b (patch) | |
| tree | 77b4f4556700463d257088af5d707aef9ba5fbae /ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c | |
| parent | ae26410e285bf0320252f99fe25055d467f86824 (diff) | |
| download | edk2-15c9b25e5d363a8f39e9df06cf60f5a45316ae2b.tar.gz edk2-15c9b25e5d363a8f39e9df06cf60f5a45316ae2b.tar.bz2 edk2-15c9b25e5d363a8f39e9df06cf60f5a45316ae2b.zip | |
ArmVirtPkg: implement DT-based ArmGicArchLib
Since it is arguably incorrect to infer the GIC revision from CPU
ID and GIC feature registers on platforms that describe the GIC in
the device tree, this implements the library class ArmGicArchLib
tailored for such platforms.
The supported GIC revision is retrieved from the dynamic PCD that
is set based on the GIC DT node.
This means this library can only execute post DXE core, but this is
not a problem for any of the virt platforms.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18102 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c')
| -rw-r--r-- | ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c new file mode 100644 index 0000000000..732860cadf --- /dev/null +++ b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c @@ -0,0 +1,75 @@ +/** @file
+ ArmGicArchLib library class implementation for DT based virt platforms
+
+ Copyright (c) 2015, Linaro Ltd. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+
+#include <Library/ArmGicLib.h>
+#include <Library/ArmGicArchLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+
+STATIC ARM_GIC_ARCH_REVISION mGicArchRevision;
+
+RETURN_STATUS
+EFIAPI
+ArmVirtGicArchLibConstructor (
+ VOID
+ )
+{
+ UINT32 IccSre;
+
+ switch (PcdGet32 (PcdArmGicRevision)) {
+
+ case 3:
+ //
+ // The default implementation of ArmGicArchLib is responsible for enabling
+ // the system register interface on the GICv3 if one is found. So let's do
+ // the same here.
+ //
+ IccSre = ArmGicV3GetControlSystemRegisterEnable ();
+ if (!(IccSre & ICC_SRE_EL2_SRE)) {
+ ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE);
+ IccSre = ArmGicV3GetControlSystemRegisterEnable ();
+ }
+
+ //
+ // Unlike the default implementation, there is no fall through to GICv2
+ // mode if this GICv3 cannot be driven in native mode due to the fact
+ // that the System Register interface is unavailable.
+ //
+ ASSERT (IccSre & ICC_SRE_EL2_SRE);
+
+ mGicArchRevision = ARM_GIC_ARCH_REVISION_3;
+ break;
+
+ case 2:
+ mGicArchRevision = ARM_GIC_ARCH_REVISION_2;
+ break;
+
+ default:
+ DEBUG ((EFI_D_ERROR, "%a: No GIC revision specified!\n", __FUNCTION__));
+ return RETURN_NOT_FOUND;
+ }
+ return RETURN_SUCCESS;
+}
+
+ARM_GIC_ARCH_REVISION
+EFIAPI
+ArmGicGetSupportedArchRevision (
+ VOID
+ )
+{
+ return mGicArchRevision;
+}
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