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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-11-09 13:27:56 +0000 |
|---|---|---|
| committer | abiesheuvel <abiesheuvel@Edk2> | 2015-11-09 13:27:56 +0000 |
| commit | 8c5ac451d570f0a5680dd7614eb19404feb717d9 (patch) | |
| tree | 1da1082f442f73a9a2746653c92f3633451662cc /ArmVirtPkg/PrePi | |
| parent | f977e6500a3c8d0d9d986c1b5be0cf495edc5500 (diff) | |
| download | edk2-8c5ac451d570f0a5680dd7614eb19404feb717d9.tar.gz edk2-8c5ac451d570f0a5680dd7614eb19404feb717d9.tar.bz2 edk2-8c5ac451d570f0a5680dd7614eb19404feb717d9.zip | |
ArmVirtPkg/PrePi: do not invalidate the entire data cache at startup
Drop the call to ArmInvalidateDataCache () from the PrePi startup
sequence. This kind of data cache maintenance should not be performed
when running under virtualization.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18757 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmVirtPkg/PrePi')
| -rwxr-xr-x | ArmVirtPkg/PrePi/PrePi.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/ArmVirtPkg/PrePi/PrePi.c b/ArmVirtPkg/PrePi/PrePi.c index f9ad374272..fe7612cec7 100755 --- a/ArmVirtPkg/PrePi/PrePi.c +++ b/ArmVirtPkg/PrePi/PrePi.c @@ -194,8 +194,6 @@ CEntryPoint ( // Data Cache enabled on Primary core when MMU is enabled.
ArmDisableDataCache ();
- // Invalidate Data cache
- ArmInvalidateDataCache ();
// Invalidate instruction cache
ArmInvalidateInstructionCache ();
// Enable Instruction Caches on all cores.
|