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authorwenyi,xie via groups.io <xiewenyi2=huawei.com@groups.io>2020-12-08 21:07:49 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2020-12-08 13:58:33 +0000
commit8e4cb8fbceb84b66b3b2fc45b9e93d70f732e970 (patch)
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ArmPkg/ArmDisassemblerLib: fix incorrect comparison
As shift = (OpCode >> 5) & 0x3, shift will never be larger than 0x3, so the comparison between shift and 0x12 will always be false. The right shift type of ASR is 0x2. Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
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