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author | Leif Lindholm <leif@nuviainc.com> | 2020-03-11 15:10:18 +0000 |
---|---|---|
committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2020-03-17 15:06:11 +0000 |
commit | 01ce872739d2f0cd3a8917be2180381db5f0391e (patch) | |
tree | d0b0fad20610ccda00309551933275bdfb17544e /ArmVirtPkg | |
parent | a2c3bf1f2f991614ac97ddcf4b31742e4366c3a5 (diff) | |
download | edk2-01ce872739d2f0cd3a8917be2180381db5f0391e.tar.gz edk2-01ce872739d2f0cd3a8917be2180381db5f0391e.tar.bz2 edk2-01ce872739d2f0cd3a8917be2180381db5f0391e.zip |
ArmVirtPkg: fix ASSERT in ArmVirtGicArchLib with virtualization=on
ArmVirtGicArchLib was originally implemented before virtualization
emulation was implemented in QEMU, and the GICv2 model implemented only
the physical copy of control registers.
Enabling virtualization emulation to QEMU adds also the virtual copy,
doubling the RegSize returned by FindCompatibleNodeReg () in
ArmVirtGicArchLibConstructor (). This triggered an ASSERT when running
QEMU with -M virt,virtualization=on. Address this by testing for both
possible valid values of RegSize.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2588
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'ArmVirtPkg')
-rw-r--r-- | ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c index af6b3af60e..5448865ad8 100644 --- a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c +++ b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c @@ -110,7 +110,12 @@ ArmVirtGicArchLibConstructor ( break;
case 2:
- ASSERT (RegSize == 32);
+ //
+ // When the GICv2 is emulated with virtualization=on, it adds a virtual
+ // set of control registers. This means the register property can be
+ // either 32 or 64 bytes in size.
+ //
+ ASSERT ((RegSize == 32) || (RegSize == 64));
DistBase = SwapBytes64 (Reg[0]);
CpuBase = SwapBytes64 (Reg[2]);
|