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author | Hao Wu <hao.a.wu@intel.com> | 2019-03-18 16:33:44 +0800 |
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committer | Hao Wu <hao.a.wu@intel.com> | 2019-04-24 16:13:14 +0800 |
commit | 04c7a5febd82681692c95450ea1979daee8f31aa (patch) | |
tree | b7fec4a2ddcc93281a173c7a3dcf660965294d9d /BaseTools/Source/Python/Common/EdkLogger.py | |
parent | 36082dffd48da4d0475ed9b71f92fdd561304e8e (diff) | |
download | edk2-04c7a5febd82681692c95450ea1979daee8f31aa.tar.gz edk2-04c7a5febd82681692c95450ea1979daee8f31aa.tar.bz2 edk2-04c7a5febd82681692c95450ea1979daee8f31aa.zip |
MdeModulePkg/AhciPei: Limit max transfer blocknum for 48-bit address
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1483
Due to the limited resource on the VTd DMA buffer size in the PEI phase,
the driver will limit the maximum transfer block number for 48-bit
addressing.
According to PCDs:
gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSize|0x00400000
gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSizeS3|0x00200000
The default buffer size allocated for IOMMU mapping is:
* 4M bytes for non-S3 cases;
* 2M bytes for S3
For ATA devices in 48-bit address mode, the maximum block number is
currently set to 0xFFFF. For a device with block size equal to 512 bytes,
the maximum buffer allowed for mapping within AhciPei driver will be close
to 32M bytes. Thus, this commit will limit the 48-bit mode maximum block
number to 0x800, which means 1M-byte maximum buffer for mapping when the
block size of a device is 512 bytes. By doing so, potential failure on
calls to the IOMMU 'Map' service can be avoided.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Diffstat (limited to 'BaseTools/Source/Python/Common/EdkLogger.py')
0 files changed, 0 insertions, 0 deletions